ITERATIVE DECODING OF CONCATENATED LOW-DENSITY PARITY-CHECK CODES

• US 20090249163A1
• Filed: 01/31/2006
• Published: 10/01/2009
• Est. Priority Date: 01/31/2006
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Ovchinnikov, Andrei Anatol'evich, Belogolovy, Andrey, Krouk, Evguenii
• Granted Patent: US 8,230,296 B2
• Time in Patent Office: Days
• US Class Current: 714/755
• CPC Class Codes: H03M 13/1102 Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
• CPC Class Codes: H03M 13/2972 Serial concatenation using convolutional component codes

Abstract

Techniques to perform iterative decoding of concatenated low-density parity-check codes (LDPC) are described. Iterative decoding of the concatenated code is achieved by performing T common iterations, wherein a common iteration comprises t1 decoding iterations on the inner LDPC code my means of a first decoder (340) followed by t2 decoding iterations on the outer LDPC code my means of a second decoder (350) , and wherein the two decoders exchange soft-output information.

Claims

1. An apparatus comprising a node having a first decoder to decode a codeword and a second decoder to decode a soft output of the first decoder, the node to iterate decoding by the first decoder and the second decoder as a common iteration.

2. The apparatus of claim 1, the codeword to comprise a concatenated low-density parity-check (LDPC) codeword.

3. The apparatus of claim 1, the node to farther iteratively decode, with the first decoder, the codeword.

4. The apparatus of claim 1, the node to further iteratively decode, with the second decoder, the soft output of the first decoder.

5. The apparatus of claim 1, wherein a number of common iterations is greater than a number of first decoder iterations, and the number of common iterations is greater than a number of second decoder iterations.

6. A system, comprising:

a communications medium; and

a node to couple to the communications medium, the node having a first decoder to decode a codeword and a second decoder to decode a soft output of the first decoder, the node to iterate decoding by the first decoder and the second decoder as a common iteration.

7. The system of claim 6, the codeword to comprise a concatenated low-density parity-check (LDPC) codeword.

8. The system of claim 6, the node to further iteratively decode, with the first decoder, the codeword.

9. The system of claim 6, the node to further iteratively decode, with the second decoder, the soft output of the first decoder.

10. The system of claim 6, wherein a number of common iterations is greater than a number of first decoder iterations, and the number of common iterations is greater than a number of second decoder iterations.

11. A method comprising:

performing a first decoding for a codeword;

performing a second decoding for a soft output of the first decoder; and

iterating the first decoding and the second decoding as a common iteration.

12. The method of claim 11, the codeword to comprise a concatenated low-density parity-check (LDPC) codeword.

13. The method of claim 11, comprising iteratively decoding the codeword.

14. The method of claim 11, comprising iteratively decoding the soft output of the first decoder.

15. The method of claim 11, wherein a number of common iterations is greater than a number of first decoding iterations, and the number of common iterations is greater than a number of second decoding iterations.

16. An article comprising a machine-readable storage medium containing instructions that if executed enable a system to perform a first decoding for a codeword, perform a second decoding for a soft output of the first decoder, and iterate the first decoding and the second decoding as a common iteration.

17. The article of claim 16, the codeword to comprise a concatenated low-density parity-check (LDPC) codeword.

18. The article of claim 16, further comprising instructions that if executed enable the system to iteratively decode the codeword.

19. The article of claim 16, further comprising instructions that if executed enable the system to iteratively decode the soft output of the first decoder.

20. The article of claim 16, wherein a number of common iterations is greater than a number of first decoding iterations, and the number of common iterations is greater than a number of second decoding iterations.