METHOD AND DEVICE FOR FAST CORRELATION CALCULATION

• US 20090259707A1
• Filed: 03/05/2007
• Published: 10/15/2009
• Est. Priority Date: 03/21/2006
• Status: Active Grant

• Current Assignee: Thales SA
• Original Assignee: Thales SA
• Inventors: Clauzel, Yves, Martin, Nicolas
• Granted Patent: US 8,301,678 B2
• Time in Patent Office: Days
• US Class Current: 708/422
• CPC Class Codes: G01S 19/30 code related G01S19/246 takes precedence
• CPC Class Codes: G06F 17/15 Correlation function computation including computation of convolution operations arithmetic circuits for sum of products per se, e.g. multiply-accumulators G06F7/5443; digital filters, e.g. FIR, IIR, adaptive filters H03H17/00
• CPC Class Codes: H04B 1/707 using direct sequence modulation

Abstract

The field of the invention is that of the reception of a radionavigation signal originating from a satellite positioning system such as the GPS system. The present invention concerns a method for calculating correlations between a first sequence and a second sequence, said first sequence and said second sequence having a duration D_Code, the first sequence being extracted from a digital signal comprising a code, said code comprising elementary time divisions, called chips, of mean duration D_chip, said chips being synchronized with pulses delivered by an NCO oscillator at the mean frequency 2/D_chip, the second sequence resulting from a sampling at a frequency F_e of an analog signal, the frequency F_e being greater than 2/D_chip. According to the invention, the method comprises a step of aggregating samples of the second sequence, over consecutive integration intervals of duration equal on average to D_chip/2, starting at each pulse of the NCO oscillator, so as to determine results of elementary aggregates.

Claims

1. A method for calculating correlations between a first sequence and a second sequence, said first sequence and said second sequence each having a duration D_Code, the first sequence being extracted from a digital signal comprising a code, said code comprising elementary time divisions, called chips, of a duration D_chip, said chips being sampled on pulses delivered by an NCO oscillator at the mean frequency 2/D_chip, the second sequence resulting from a sampling at a frequency Fe of an analog signal, the frequency Fe being greater than 2/D_chip, said method comprising a step of aggregating the samples of the second sequence, over consecutive integration intervals of duration equal on average to D_chip/2, starting at each pulse of the NCO oscillator, so as to determine results of elementary aggregates, the results of elementary aggregates being employed to determine results of calculations of correlations between a first sequence and second sequences, the second sequences being deduced from one another by a time shift of duration D_chip/2, comprising the following steps:

of summing two results of consecutive elementary aggregates to obtain double elementary aggregate results;

of weighting each result of double elementary aggregate of the second sequence by the value of the code of the first sequence to obtain results of weighted double aggregates; and

of accumulating the results of weighted double aggregates.

2. The method for calculating correlations as claimed in claim 1, wherein the accumulation step delivers at least one result after p successive pulses of the NCO oscillator, where p is equal to the integer part of D_Code/D_chip.

3. The method for calculating correlations as claimed in claim 1, wherein the accumulation step delivers a result at each pulse of the NCO oscillator.

4. The method for calculating correlations as claimed in claim 1, wherein the first sequence is a pseudo-random code, the analog signal comprises a carrier modulated by the pseudo-random code and in that the modulation is of BPSK type.

5. The method for calculating correlations as claimed in claim 1, wherein the analog signal comprises a modulation by a sub-carrier.

6. A receiver of a radionavigation signal, comprising a digital component of ASIC or FPGA type able to implement the method as claimed in claim 1.