SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

• US 20090267047A1
• Filed: 04/27/2009
• Published: 10/29/2009
• Est. Priority Date: 04/28/2008
• Status: Abandoned Application

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: MATSUOKA, Hideyuki, SHIMA, Akio, MINE, Toshiyuki, TAKAURA, Norikatsu, HATANO, Mutsuko, KINOSHITA, Masaharu, SASAGO, Yoshitaka, TAKEMURA, Riichiro
• Application Number:
  US12/430,539
• Publication Number:
  US 20090267047A1
• Time in Patent Office: Days
• US Class Current: 257/4
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02675 using laser beams
• CPC Class Codes: H10B 63/20 comprising selection components having two electrodes, e.g. diodes
• CPC Class Codes: H10B 63/84 arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
• CPC Class Codes: H10N 70/20 Multistable switching devices, e.g. memristors
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8828 Tellurides, e.g. GeSbTe
• CPC Class Codes: H10N 70/8833 Binary metal oxides, e.g. TaOx

Abstract

The present invention can promote the large capacity, high performance and high reliability of a semiconductor memory device by realizing high-performance of both the semiconductor device and a memory device when the semiconductor memory device is manufactured by stacking a memory device such as ReRAM or the phase change memory and the semiconductor device. After a polysilicon forming a selection device is deposited in an amorphous state at a low temperature, the crystallization of the polysilicon and the activation of impurities are briefly performed with heat treatment by laser annealing. When laser annealing is performed, the recording material located below the silicon subjected to the crystallization is completely covered with a metal film or with the metal film and an insulating film, thereby making it possible to suppress a temperature increase at the time of performing the annealing and to reduce the thermal load of the recording material.

Claims

1. A method of manufacturing a semiconductor memory device having a structure where semiconductor devices including silicon materials and recording materials such as phase change materials or ReRAM materials are stacked, comprising:

(1) depositing the recording materials on a semiconductor substrate;

(2) depositing a metal film to cover an entire surface of the semiconductor substrate on which the recording materials are deposited;

(3) depositing an amorphous silicon forming the semiconductor device on the metal film; and

(4) crystallizing the amorphous silicon by annealing in a short time.

2. The method of manufacturing a semiconductor memory device according to claim 1, wherein as the metal film deposited at step (2), a stacked film of W, W and Ti, Ni, or Co is deposited.

3. The method of manufacturing a semiconductor memory device according to claim 1, further comprising:

prior to step (4), forming a first conductive type impurity region in one of an upper region that is located on a surface side of the amorphous silicon and a lower region that is located on the metal film side; and

forming a second conductive type impurity region in the other of the upper region and the lower region.

4. The method of manufacturing a semiconductor memory device according to claim 3, wherein any one or both of the first conductive type impurity region and the second conductive type impurity region are formed by ion implantation.

5. The method of manufacturing a semiconductor memory device according to claim 4, wherein after the amorphous silicon including the first conductive type impurity region is deposited, the second conductive type impurity region is formed by ion implantation.

6. The method of manufacturing a semiconductor memory device according to claim 4, wherein after the amorphous silicon including the first conductive type impurity region is deposited and a second amorphous silicon is deposited on the amorphous silicon including the first conductive type impurity region, the second conductive type impurity region is formed by ion implantation.

7. The method of manufacturing a semiconductor memory device according to claim 6, further comprising:

after the amorphous silicon including the first conductive type impurity region is deposited, crystallizing the amorphous silicon including the first conductive type impurity region by annealing in a short time; and

after the second amorphous silicon is deposited on the silicon including the crystallized first conductive type impurity region, forming the second conductive type impurity region by ion implantation.

8. The method of manufacturing a semiconductor memory device according to claim 1, further comprising:

prior to step (4), forming a first conductive type high-concentration impurity region in one of the upper region that is located on a surface side of the amorphous silicon and the lower region that is located on the metal film side; and

forming a first conductive type low-concentration impurity region in the other of the upper region and the lower region.

9. The method of manufacturing a semiconductor memory device according to claim 1, wherein when forming a memory having a structure in a pillar shape where the recording material and the semiconductor device are stacked,

at step (2), before the entire surface of the semiconductor substrate is covered with the metal film, the recording material is patterned in a stripe shape or a dot shape by using a minimum dimension when the structure in the pillar shape is processed.

10. The method of manufacturing a semiconductor memory device according to claim 1, wherein at step (4) before the amorphous silicon is crystallized, patterning is performed so that the metal film formed at step (2) is left in a portion where the semiconductor devices are stacked.

11. The method of manufacturing a semiconductor memory device according to claim 9, further comprising burying an insulating film in a space between the recording materials that are patterned in the stripe shape or the dot shape.

12. A method of manufacturing a semiconductor memory device having a structure where an array of a memory cell including silicon materials forming semiconductor devices and a recording material such as a phase change material or an ReRAM material are stacked, comprising:

(A) depositing the recording materials on a semiconductor substrate;

(B) depositing an insulating film to cover an entire surface of the semiconductor substrate on which the recording materials are deposited;

(C) depositing the metal film to cover an entire surface of the insulating film;

(D) depositing an amorphous silicon forming a diode on the metal film; and

(E) crystallizing the amorphous silicon by annealing in a short time.

13. The method of manufacturing a semiconductor memory device according to claim 12, further comprising:

at step (D), forming a first conductive type impurity region in one of an upper region that is located on a surface side of the amorphous silicon and a lower region that is located on the metal film side; and

forming a second conductive type impurity region in the other of the upper region and the lower region.

14. The method of manufacturing a semiconductor memory device according to claim 13, wherein any one or both of the first conductive type impurity region and the second conductive type impurity region are formed by ion implantation.

15. The method of manufacturing a semiconductor memory device according to claim 13, wherein after the amorphous silicon including the first conductive type impurity region is deposited, the second conductive type impurity region is formed by ion implantation.

16. The method of manufacturing a semiconductor memory device according to claim 12, further comprising:

at step (D), forming a first conductive type high-concentration impurity region in one of the upper region that is located on a surface side of the amorphous silicon and the lower region that is located on the metal film side; and

forming a first conductive type low-concentration impurity region in the other of the upper region and the lower region.

17. The method of manufacturing a semiconductor memory device according to claim 12, wherein when forming a memory having a structure in a pillar shape where the recording material and the semiconductor device are stacked,

at step (B), before the entire surface of the semiconductor substrate is covered with the insulating film, the recording material of step (A) is patterned in a stripe shape or a dot shape by using a minimum dimension when the structure in the pillar shape is processed.

18. The method of manufacturing a semiconductor memory device according to claim 17, further comprising burying an insulating film in a space between the recording materials that are patterned in the stripe shape or the dot shape.

19. A semiconductor memory device comprising:

an insulating film that is formed on a semiconductor substrate;

a plurality of first metal lines that are formed on the insulating film;

a plurality of diodes that are formed on each of the plurality of first metal lines;

first electrodes that are formed on each of the plurality of diodes;

recording materials such as phase change materials or ReRAM materials that are formed on the first electrodes;

second electrodes that are formed on the phase change materials; and

a plurality of second metal lines that are formed the second electrodes,

wherein the first metal line is made of metal having thermal conductivity higher than that of the second electrode interposed between the recording material and the second metal line.

20. The semiconductor memory device according to claim 19, wherein the first electrode and the second electrode are made of metal having thermal conductivity lower than that of the first metal line and the second metal line.