SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

• US 20090278252A1
• Filed: 04/24/2009
• Published: 11/12/2009
• Est. Priority Date: 05/12/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Eguchi, Shingo, Oikawa, Yoshiaki, Yamazaki, Shunpei
• Granted Patent: US 8,384,209 B2
• Time in Patent Office: Days
• US Class Current: 257/702
• CPC Class Codes: H01L 21/71 Manufacture of specific parts of devices defined in group H01L21/70 H01L21/0405, H01L21/0445 , H01L21/28, H01L21/44, H01L21/48 take precedence
• CPC Class Codes: H01L 23/293 Organic, e.g. plastic
• CPC Class Codes: H01L 23/3157 Partial encapsulation or coating mask layer used as insulation layer H01L21/31
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/19041 being a capacitor

Abstract

To reduce defects of a semiconductor device, such as defects in shape and characteristic due to external stress and electrostatic discharge. To provide a highly reliable semiconductor device. In addition, to increase manufacturing yield of a semiconductor device by reducing the above defects in the manufacturing process. The semiconductor device includes a semiconductor integrated circuit sandwiched by impact resistance layers against external stress and an impact diffusion layer diffusing the impact and a conductive layer covering the semiconductor integrated circuit. With the use of the conductive layer covering the semiconductor integrated circuit, electrostatic breakdown (malfunctions of the circuit or damages of a semiconductor element) due to electrostatic discharge of the semiconductor integrated circuit can be prevented.

Claims

1. A semiconductor device comprising:

a conductive layer;

a first layer over the conductive layer, the first layer including an organic resin and a fibrous body;

a second layer over the first layer, the second layer including an organic resin and a fibrous body; and

a semiconductor integrated circuit between the first layer and the second layer.

2. The semiconductor device according to claim 1, further comprising an antenna electrically connected to the semiconductor integrated circuit,

wherein the antenna is interposed between the semiconductor integrated circuit and the second layer.

3. The semiconductor device according to claim 2, further comprising an inorganic insulating layer between the antenna and the first layer.

4. The semiconductor device according to claim 1, wherein the conductive layer and the semiconductor integrated circuit are electrically insulated from each other.

5. The semiconductor device according to claim 1, wherein each of the fibrous bodies in the first layer and the second layer is a woven or nonwoven fabric.

6. A semiconductor device comprising:

a conductive layer;

a first layer over the conductive layer, the first layer including an organic resin and a fibrous body;

a second layer over the first layer;

a third layer over the second layer, the third layer including an organic resin and a fibrous body;

a fourth layer over the third layer; and

a semiconductor integrated circuit between the second layer and the third layer,

wherein the second layer has a lower modulus of elasticity and higher breaking strength than the first layer, and

wherein the fourth layer has a lower modulus of elasticity and higher breaking strength than the third layer.

7. The semiconductor device according to claim 6, further comprising an antenna electrically connected to the semiconductor integrated circuit,

wherein the antenna is interposed between the semiconductor integrated circuit and the second layer.

8. The semiconductor device according to claim 7, further comprising an inorganic insulating layer between the antenna and the first layer.

9. The semiconductor device according to claim 6, wherein the conductive layer and the semiconductor integrated circuit are electrically insulated from each other.

10. The semiconductor device according to claim 6, wherein each of the second layer and the fourth layer includes an aramid resin.

11. The semiconductor device according to claim 6, wherein each of the fibrous bodies in the first layer and the third layer is a woven or nonwoven fabric.

12. The semiconductor device according to claim 6, wherein each of the organic resins in the first layer and the third layer is selected from the group consisting of an epoxy resin, an unsaturated polyester resin, a polyimide resin, a bismaleimide-triazine resin, a cyanate resin, a polyphenylene oxide resin, a polyetherimide resin, and a fluorine resin.

13. A semiconductor device comprising:

a conductive layer;

a first layer over the conductive layer;

a second layer over the conductive layer, the second layer including a fibrous body and an organic resin;

a third layer over the second layer, the third layer including a fibrous body and an organic resin;

a fourth layer over the third layer; and

a semiconductor integrated circuit between the second layer and the third layer,

wherein the first layer has a lower modulus of elasticity and higher breaking strength than the second layer, and

wherein the fourth layer has a lower modulus of elasticity and higher breaking strength than the third layer.

14. The semiconductor device according to claim 13, further comprising an antenna electrically connected to the semiconductor integrated circuit,

wherein the antenna is interposed between the semiconductor integrated circuit and the second layer.

15. The semiconductor device according to claim 14, further comprising an inorganic insulating layer between the antenna and the first layer.

16. The semiconductor device according to claim 13, wherein the conductive layer and the semiconductor integrated circuit are electrically insulated from each other.

17. The semiconductor device according to claim 13, wherein each of the first layer and the fourth layer includes an aramid resin.

18. The semiconductor device according to claim 13, wherein each of the fibrous bodies in the second layer and the third layer is a woven or nonwoven fabric.

19. The semiconductor device according to claim 13, wherein each of the organic resins in the second layer and the third layer is selected from the group consisting of an epoxy resin, an unsaturated polyester resin, a polyimide resin, a bismaleimide-triazine resin, a cyanate resin, a polyphenylene oxide resin, a polyetherimide resin, and a fluorine resin.

20. A semiconductor device comprising:

a semiconductor integrated circuit sandwiched between a first impact resistance layer and a second impact resistance layer; and

a conductive layer on a side opposite to a side where the semiconductor integrated circuit is provided, of the first impact resistance layer.

21. The semiconductor device according to claim 20, wherein the first impact resistance layer has a structure body in which a fibrous body is impregnated with an organic resin, and

wherein the second impact resistance layer has a structure body in which a fibrous body is impregnated with an organic resin.

22. The semiconductor device according to claim 20, further comprising a first impact diffusion layer on a side opposite to a side where the semiconductor integrated circuit is provided, of the first impact resistance layer,

wherein the first impact diffusion layer has a lower modulus of elasticity and higher breaking strength than the first impact resistance layer and the second impact resistance layer.

23. The semiconductor device according to claim 20, further comprising a second impact diffusion layer on a side opposite to a side where the semiconductor integrated circuit is provided, of the second impact resistance layer,

wherein the second impact diffusion layer has a lower modulus of elasticity and higher breaking strength than the first impact resistance layer and the second impact resistance layer.

24. The semiconductor device according to claim 20, further comprising an antenna electrically connected to the semiconductor integrated circuit,

wherein the antenna is interposed between the semiconductor integrated circuit and the second impact resistance layer.

25. The semiconductor device according to claim 20, wherein the conductive layer and the semiconductor integrated circuit are electrically insulated from each other.

26. A method for manufacturing a semiconductor device, comprising the steps of:

forming a separation layer over a substrate;

forming a semiconductor integrated circuit over the separation layer;

attaching a first layer to the semiconductor integrated circuit and attaching a second layer to the first layer, the first layer interposed between the semiconductor integrated circuit and the second layer;

separating the semiconductor integrated circuit from the substrate;

attaching a third layer to the semiconductor integrated circuit separated from the substrate and attaching a fourth layer to the third layer, the third layer being interposed between the semiconductor integrated circuit and the fourth layer; and

forming a conductive layer so that the conductive layer and the semiconductor integrated circuit are electrically insulated from each other,

wherein the first layer includes an organic resin and a fibrous body, and

wherein the third layer includes an organic resin and a fibrous body.

27. The method for manufacturing a semiconductor device, according to claim 26, wherein each of the second layer and the fourth layer includes an aramid resin.

28. The method for manufacturing a semiconductor device, according to claim 26, wherein each of the fibrous bodies in the first layer and the third layer is a woven or nonwoven fabric.

29. The method for manufacturing a semiconductor device, according to claim 26, wherein each of the organic resins in the first layer and the third layer is selected from the group consisting of an epoxy resin, an unsaturated polyester resin, a polyimide resin, a bismaleimide-triazine resin, a cyanate resin, a polyphenylene oxide resin, a polyetherimide resin, and a fluorine resin.

30. The method for manufacturing a semiconductor device, according to claim 26, further comprising the step of providing an antenna electrically connected to the semiconductor integrated circuit,

wherein the antenna is interposed between the semiconductor integrated circuit and the first layer, and

wherein the antenna is located on a side opposite to the conductive layer through the semiconductor integrated circuit.

31. A method for manufacturing a semiconductor device, comprising the steps of:

forming a separation layer over a substrate;

forming a semiconductor integrated circuit over the separation layer, the semiconductor integrated circuit including an antenna;

attaching a first impact resistance layer to the semiconductor integrated circuit;

separating the semiconductor integrated circuit from the substrate;

attaching a second impact resistance layer to the semiconductor integrated circuit separated from the substrate, wherein the semiconductor integrated circuit is interposed between the first impact resistance layer and the second impact resistance layer; and

forming a conductive layer so that the conductive layer and the semiconductor integrated circuit are electrically insulated from each other,

wherein the first impact resistance layer includes an organic resin and a fibrous body, and

wherein the second impact resistance layer includes an organic resin and a fibrous body.