LIQUID CRYSTAL DISPLAY DEVICE AND RELATED DRIVING METHOD

• US 20090279006A1
• Filed: 06/26/2008
• Published: 11/12/2009
• Est. Priority Date: 05/07/2008
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: AU Optronics Corporation
• Inventors: Chien, Chih-Yuan, Chen, Pei-Yi
• Granted Patent: US 8,373,811 B2
• Time in Patent Office: Days
• US Class Current: 349/37
• CPC Class Codes: G02F 1/134345 Subdivided pixels, e.g. for grey scale or redundancy
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/13624 having more than one switching element per pixel
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/0205 Simultaneous scanning of several lines in flat panels
• CPC Class Codes: G09G 2320/028 by changing the viewing angle properties, e.g. widening the viewing angle, adapting the viewing angle to the view direction
• CPC Class Codes: G09G 3/3607 for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A liquid crystal display (LCD) device essentially includes a plurality of data lines, a plurality of gate lines and a plurality of pixel units. Each pixel unit includes a first liquid-crystal capacitor, a second liquid-crystal capacitor, a first switch and a second switch. The first liquid-crystal capacitor of a pixel unit is charged via the first switch of the same pixel unit. The second liquid-crystal capacitor of a pixel unit is charged via the second switch of the same pixel unit and the first switch of a different pixel unit. The sub-pixel voltages corresponding to the first and second liquid-crystal capacitors of the same pixel unit have the same polarity. Furthermore, disclosed is a liquid-crystal display driving method for writing two data signals having same polarity respectively into the first and second liquid-crystal capacitors of a pixel unit via the same date line during two intervals partly overlapped.

Claims

1. A liquid crystal display device comprising:

a plurality of data lines, each of the data lines being adapted to receive a corresponding data signal;

a plurality of gate lines, each of the gate lines being adapted to receive a corresponding gate signal;

a plurality of common lines for receiving a common voltage; and

a plurality of columns of pixel units, each column of pixel units comprising a plurality of pixel units, an nth pixel unit of an mth column of pixel units in the columns of pixel units comprising;

a first liquid-crystal capacitor comprising a first end coupled to a corresponding common line of the common lines, and a second end;

a second liquid-crystal capacitor comprising a first end coupled to the corresponding common line, and a second end;

a first switch comprising a first end coupled to the second end of the first liquid-crystal capacitor, a gate coupled to a corresponding gate line of the gate lines, and a second end coupled to a corresponding data line of the data lines; and

a second switch comprising a first end coupled to the second end of the second liquid-crystal capacitor, a gate coupled to the corresponding gate line, and a second end coupled to the first end of the first switch of a different pixel unit;

wherein the second end of the first switch of the different pixel unit is coupled to the corresponding data line.

2. The liquid crystal display device of claim 1, wherein the different pixel unit is a (n+x)th pixel unit of the mth column of pixel units;

wherein m and n are positive integer, and x is an even number.

3. The liquid crystal display device of claim 2, wherein x is equal to 2.

4. The liquid crystal display device of claim 1, wherein:

the second end of the first switch in the nth pixel unit of the mth column of pixel units is coupled to an mth data line of the data lines; and

the second end of the first switch in a (n+2)th pixel unit of the mth column of pixel units is coupled to the mth data line;

wherein the first end of the first switch in the (n+2)th pixel unit of the mth column of pixel units is coupled to the second end of the second switch in the nth pixel unit of the mth column of pixel units.

5. The liquid crystal display device of claim 4, wherein:

the second end of the first switch in a (n+1)th pixel unit of the mth column of pixel units is coupled to a (m+1)th data line of the data lines; and

the second end of the first switch in a (n+3)th pixel unit of the mth column of pixel units is coupled to the (m+1)th data line;

wherein the first end of the first switch in the (n+3)th pixel unit of the mth column of pixel units is coupled to the second end of the second switch in the (n+1)th pixel unit of the mth column of pixel units.

6. The liquid crystal display device of claim 1, wherein:

the second end of the first switch in an nth pixel unit of a (m+1)th column of pixel units of the columns of pixel units is coupled to a (m+1)th data line of the data lines; and

the second end of the first switch in a (n+2)th pixel unit of the (m+1)th column of pixel units is coupled to the (m+1)th data line;

wherein the first end of the first switch in a (n+2)th pixel unit of the (m+1)th column of pixel units is coupled to the second end of the second switch in the nth pixel unit of the (m+1)th column of pixel units.

7. The liquid crystal display device of claim 6, wherein:

the second end of the first switch in a (n+1)th pixel unit of the (m+1)th column of pixel units is coupled to a (m+2)th data line of the data lines; and

the second end of the first switch in a (n+3)th pixel unit of the (m+1)th column of pixel units is coupled to the (m+2)th data line;

wherein the first end of the first switch in the (n+3)th pixel unit of the (m+1)th column of pixel units is coupled to the second end of the second switch in the (n+1)th pixel unit of the (m+1)th column of pixel units.

8. The liquid crystal display device of claim 1, further comprising:

a first auxiliary gate line adjacent to a first gate line of the gate lines, the first auxiliary gate line being adapted to receive a first auxiliary gate signal;

a second auxiliary gate line adjacent to the first auxiliary gate line, the second auxiliary gate line being adapted to receive a second auxiliary gate signal;

a first auxiliary common line for receiving the common voltage;

a second auxiliary common line for receiving the common voltage;

a first row of auxiliary pixel units comprising a plurality of auxiliary pixel units, each of the auxiliary pixel units in the first row of auxiliary pixel units comprising;

a first auxiliary capacitor comprising a first end coupled to the first auxiliary common line, and a second end; and

a first auxiliary switch comprising a first end coupled to the second end of the first auxiliary capacitor, a gate coupled to the first auxiliary gate line, and a second end coupled to the first end of a corresponding first switch; and

a second row of auxiliary pixel units comprising a plurality of auxiliary pixel units, each of the auxiliary pixel units in the second row of auxiliary pixel units comprising;

a second auxiliary capacitor comprising a first end coupled to the second auxiliary common line, and a second end; and

a second auxiliary switch comprising a first end coupled to the second end of the second auxiliary capacitor, a gate coupled to the second auxiliary gate line, and a second end coupled to the first end of a corresponding first switch.

9. The liquid crystal display device of claim 8, wherein:

the second end of the first auxiliary switch in an mth auxiliary pixel unit of the first row of auxiliary pixel units is coupled to the first end of the first switch in a second pixel unit of the mth column of pixel units; and

the second end of the second auxiliary switch in an mth auxiliary pixel unit of the second row of auxiliary pixel units is coupled to the first end of the first switch in a first pixel unit of the mth column of pixel units.

10. The liquid crystal display device of claim 1, further comprising:

a first auxiliary gate line adjacent to a last gate line of the gate lines, the first auxiliary gate line being adapted to receive a first auxiliary gate signal;

a second auxiliary gate line adjacent to the first auxiliary gate line, the second auxiliary gate line being adapted to receive a second auxiliary gate signal;

a first auxiliary common line for receiving the common voltage;

a second auxiliary common line for receiving the common voltage;

a first row of auxiliary pixel units comprising a plurality of auxiliary pixel units, each of the auxiliary pixel units in the first row of auxiliary pixel units comprising;

a first auxiliary switch comprising a first end coupled to the second end of a corresponding second switch, a gate coupled to the first auxiliary gate line, and a second end coupled to a corresponding data line; and

a first auxiliary capacitor comprising a first end coupled to the first auxiliary common line, and a second end coupled to the first end of the first auxiliary switch; and

a second row of auxiliary pixel units comprising a plurality of auxiliary pixel units, each of the auxiliary pixel units in the second row of auxiliary pixel units comprising;

a second auxiliary switch comprising a first end coupled to the second end of a corresponding second switch, a gate coupled to the second auxiliary gate line, and a second end coupled to a corresponding data line; and

a second auxiliary capacitor comprising a first end coupled to the second auxiliary common line, and a second end coupled to the first end of the second auxiliary switch.

11. The liquid crystal display device of claim 10, wherein:

the first end of the first auxiliary switch in an mth auxiliary pixel unit of the first row of auxiliary pixel units is coupled to the second end of the second switch in a penultimate pixel unit of the mth column of pixel units; and

the first end of the second auxiliary switch in an mth auxiliary pixel unit of the second row of auxiliary pixel units is coupled to the second end of the second switch in a last pixel unit of the mth column of pixel units.

12. A driving method for driving an LCD device, the LCD device comprising a plurality of data lines, a plurality of gate lines and a plurality of rows of pixel units, the driving method comprising:

writing a first data signal with a first polarity into a first liquid-crystal capacitor of an mth pixel unit of an nth row of pixel units in the rows of pixel units via an mth data line of the data lines and a first switch of the mth pixel unit in the nth row of pixel units during a first interval of a Kth frame time; and

writing a second data signal with the first polarity into a second liquid-crystal capacitor of the mth pixel unit in the nth row of pixel units via the mth data line, a first switch of an mth pixel unit of a (n+x)th row of pixel units in the rows of pixel units, and a second switch of the mth pixel unit in the nth row of pixel units during a second interval of the Kth frame time;

wherein K, m and n are positive integers, and x is an even number.

13. The driving method of claim 12, further comprising:

writing a third data signal with a second polarity into a first liquid-crystal capacitor of an mth pixel unit of a (n+1)th row of pixel units in the rows of pixel units via a (m+1)th data line of the data lines and a first switch of the mth pixel unit in the (n+1)th row of pixel units during a third interval of the Kth frame time; and

writing a fourth data signal with the second polarity into a second liquid-crystal capacitor of the mth pixel unit in the (n+1)th row of pixel units via the (m+1)th data line, a first switch of an mth pixel unit of a (n+x+1)th row of pixel units in the rows of pixel units, and a second switch of the mth pixel unit in the (n+1)th row of pixel units during a fourth interval of the Kth frame time.

14. The driving method of claim 13, wherein the first polarity is positive and the second polarity is negative.

15. The driving method of claim 13, wherein the first polarity is negative and the second polarity is positive.

16. The driving method of claim 13, wherein the first interval and the second interval are within a first frame time of the Kth frame time, and the third interval and the fourth interval are within a second frame time of the Kth frame time.

17. The driving method of claim 16, wherein the first frame time is a fore-half frame time or a rear-half frame time.

18. The driving method of claim 13, wherein the first interval and the second interval are partly overlapped, and the third interval and the fourth interval are partly overlapped.

19. The driving method of claim 13, wherein the second interval is part of the first interval, and the fourth interval is part of the third interval.

20. The driving method of claim 13, further comprising:

writing a fifth data signal with the second polarity into a first liquid-crystal capacitor of a (m+1)th pixel unit in the nth row of pixel units via the (m+1)th data line and a first switch of the (m+1)th pixel unit in the nth row of pixel units during the first interval;

writing a sixth data signal with the second polarity into a second liquid-crystal capacitor of the (m+1)th pixel unit in the nth row of pixel units via the (m+1)th data line, a first switch of a (m+1)th pixel unit in the (n+x)th row of pixel units, and a second switch of the (m+1)th pixel unit in the nth row of pixel units during the second interval;

writing a seventh data signal with the first polarity into a first liquid-crystal capacitor of a (m+1)th pixel unit in the (n+1)th row of pixel units via a (m+2)th data line of the data lines and a first switch of the (m+1)th pixel unit in the (n+1)th row of pixel units during the third interval; and

writing an eighth data signal with the first polarity into a second liquid-crystal capacitor of the (m+1)th pixel unit in the (n+1)th row of pixel units via the (m+2)th data line, a first switch of a (m+1)th pixel unit of a (n+x+1)th row of pixel units in the rows of pixel units, and a second switch of the (m+1)th pixel unit in the (n+1)th row of pixel units during the fourth interval.