Structure and Method for Forming a Shielded Gate Trench FET with an Inter-electrode Dielectric Having a Low-k Dielectric Therein
First Claim
Patent Images
1. A shielded gate trench field effect transistor (FET), comprising:
- trenches extending into a semiconductor region;
a shield electrode in a bottom portion of each trench, the shield electrode being insulated from the semiconductor region by a shield dielectric;
a gate electrode over the shield electrode; and
an inter-electrode dielectric (IED) extending between the shield electrode and the gate electrode, the IED comprising a low-k dielectric.
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Abstract
A shielded gate trench field effect transistor (FET) comprises trenches extending into a semiconductor region. A shield electrode is disposed in a bottom portion of each trench. The shield electrode is insulated from the semiconductor region by a shield dielectric. A gate electrode is disposed in each trench over the shield electrode, and an inter-electrode dielectric (IED) comprising a low-k dielectric extends between the shield electrode and the gate electrode.
62 Citations
42 Claims
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1. A shielded gate trench field effect transistor (FET), comprising:
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trenches extending into a semiconductor region; a shield electrode in a bottom portion of each trench, the shield electrode being insulated from the semiconductor region by a shield dielectric; a gate electrode over the shield electrode; and an inter-electrode dielectric (IED) extending between the shield electrode and the gate electrode, the IED comprising a low-k dielectric. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A shielded gate trench field effect transistor (FET), comprising:
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trenches extending into a semiconductor region; a shield electrode in a bottom portion of each trench; a gate electrode over the shield electrode; an inter-electrode dielectric (IED) extending between the shield electrode and the gate electrode, the IED comprising a low-k dielectric and an oxide region, the low-k dielectric extending along each side and a bottom of the oxide region; and a gate dielectric extending between the gate electrode and the semiconductor region, the gate dielectric comprising a high-k dielectric. - View Dependent Claims (17, 18, 19, 20)
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21-30. -30. (canceled)
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31. A method for forming a shielded gate trench field effect transistor (FET), the method comprising:
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forming trenches in a semiconductor region; forming a shield electrode in a bottom portion of each trench; forming an inter-electrode dielectric (IED) extending over the shield electrode, the IED comprising a low-k dielectric; and forming a gate electrode in an upper portion of each trench over the IED. - View Dependent Claims (32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42)
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Specification