COMPONENTS AND CONFIGURATIONS FOR TEST AND VALUATION OF INTEGRATED OPTICAL BUSSES

• US 20100057394A1
• Filed: 08/29/2008
• Published: 03/04/2010
• Est. Priority Date: 08/29/2008
• Status: Active Grant

• Current Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Original Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Inventors: Carothers, Daniel N., Berger, Richard W.
• Granted Patent: US 7,987,066 B2
• Time in Patent Office: Days
• US Class Current: 702/117
• CPC Class Codes: G06F 11/221 to test buses, lines or interfaces, e.g. stuck-at or open line faults

Abstract

An apparatus and method is provided for the testing of an optical bus, that method comprising: loading transmission test data and address information for at least one receiving cell via an electronic bus in a first register; setting a clock rate for the optical bus; employing the optical bus to transmit the test data from the first register to the at least one receiving cell; reading out received test data from the receiving cell via the electronic bus; correlating the received test data from the first register with the transmission test data; analyzing errors in the received data and handling of the received data by the bus.

Claims

1. A system for the testing of optical buses, the system comprising:

A plurality of registers disposed on a ASIC;

An electrical bus connecting said plurality of registers.

2. A method for the testing of an optical bus, said method comprising:

Loading transmission test data and address information for at least one receiving cell via an electronic bus in a first register;

Setting a clock rate for said optical bus;

Employing said optical bus to transmit said test data from said first register to said at least one receiving cell;

Reading out received test data from said receiving cell via said electronic bus;

Correlating said received test data from said first register with said transmission test data;

Analyzing errors in said received data and handling of said received data by said bus.