SYSTEM AND METHOD FOR AVOIDING STALL USING TIMER FOR HIGH-SPEED DOWNLINK PACKET ACCESS SYSTEM

• US 20100061243A1
• Filed: 11/18/2009
• Published: 03/11/2010
• Est. Priority Date: 01/05/2002
• Status: Active Grant

• Current Assignee: LG Electronics, Inc. (LG Corporation)
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: LEE, So Young, YI, Seung June, YEO, Woon Young
• Granted Patent: US 8,400,922 B2
• Time in Patent Office: Days
• US Class Current: 370/235
• CPC Class Codes: H04B 7/0604 with predefined switching scheme
• CPC Class Codes: H04B 7/15507 Relay station based processing for cell extension or control of coverage area, network planning with network coordinated processing with regard to cell extension H04W16/26; network topologies using dedicated repeater stations H04W84/047; terminal devices adapted for relaying to or from an other terminal H04W88/04
• CPC Class Codes: H04B 7/15535 Control of relay amplifier gain amplifier gain control in general H03G3/00; gain control reducing self - or loop interference H04B7/15578
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27
• CPC Class Codes: H04L 1/06 using space diversity
• CPC Class Codes: H04L 1/08 by repeating transmission, e.g. Verdan system H04L1/1858 and H04L1/189 take precedence
• CPC Class Codes: H04L 1/1841 Resequencing
• CPC Class Codes: H04L 1/1845 Combining techniques, e.g. code combining
• CPC Class Codes: H04L 1/1848 Time-out mechanisms
• CPC Class Codes: H04L 2001/0096 Channel splitting in point-to-point links
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/28 in relation to timing considerations
• CPC Class Codes: H04L 47/34 ensuring sequence integrity, e.g. using sequence numbers
• CPC Class Codes: H04L 5/0023 Time-frequency-space
• CPC Class Codes: H04L 5/0042 intra-user or intra-terminal allocation
• CPC Class Codes: H04L 5/0044 allocation of payload
• CPC Class Codes: H04L 5/0083 symbol-by-symbol
• CPC Class Codes: H04L 69/28 Timers or timing mechanisms used in protocols
• CPC Class Codes: H04W 24/02 Arrangements for optimising operational condition
• CPC Class Codes: H04W 28/02 Traffic management, e.g. flow control or congestion control
• CPC Class Codes: H04W 28/14 : using intermediate storage
• CPC Class Codes: H04W 52/143 : Downlink power control
• CPC Class Codes: H04W 52/225 : Calculation of statistics, e.g. average, variance
• CPC Class Codes: H04W 52/24 : using SIR [Signal to Interference Ratio] or other wireless path parameters
• CPC Class Codes: H04W 52/241 : taking into account channel quality metrics, e.g. SIR, SNR, CIR, Eb/lo
• CPC Class Codes: H04W 52/242 : taking into account path loss
• CPC Class Codes: H04W 52/245 : taking into account received signal strength
• CPC Class Codes: H04W 52/46 : in multi hop networks, e.g. wireless relay networks
• CPC Class Codes: H04W 8/04 : Registration at HLR or HSS [Home Subscriber Server]

Abstract

At least one timer is used to prevent a stall condition. If a timer is not active, the timer is started for a data block that is correctly received. The data block has a sequence number higher than a sequence number of another data block that was first expected to be received. When the timer is stopped or expires, all correctly received data blocks among data blocks up to and including a data block having a sequence number that is immediately before the sequence number of the data block for which the timer was started is delivered to a higher layer. Further, all correctly received data blocks up to a first missing data block, including the data block for which the timer was started, is delivered to the higher layer.

Claims

1. A method of processing data blocks including packet data in a receiver of a mobile communications system, the method comprising:

delivering first received data blocks that can be delivered to a higher entity; and

starting a timer for a data block with a highest sequence number among second received data blocks that cannot be delivered to the higher entity.

2. The method of claim 1, wherein the steps are implemented in a mobile terminal.

3. The method of claim 1, wherein the steps are implemented in a Node B.

4. The method of claim 1, wherein a period of the timer is less than or equal to N*(TTI/2), wherein N is the range of sequence numbers to be assigned to the data blocks, and TTI is the transmission time interval.

5. The method of claim 1, wherein the steps are performed at a medium access control layer.

6. The method of claim 1, wherein the data blocks are delivered to the higher entity in sequence.

7. The method of claim 1, wherein the data block is a MAC-hs protocol data unit (PDU).

8. The method of claim 1, wherein the higher entity is a MAC-d sub-layer.

9. The method of claim 1, wherein the higher entity is a radio link control layer (RLC).

10. The method of claim 1, wherein the higher entity is a disassembly entity.

11. The method of claim 1, wherein the steps are for high-speed data packet access technology.

12. An apparatus to process data blocks including packet data in a receiver of a mobile communications system, apparatus comprising:

a buffer;

a timer; and

a medium access control entity connected with the buffer and the timer, the medium access control entity adapted to,

deliver first received data blocks that can be delivered to a higher entity, and

start a timer for a data block with a highest sequence number among second received data blocks that cannot be delivered to the higher entity.

13. The apparatus of claim 12, wherein no additional timers are started when the timer is active.

14. The apparatus of claim 12, wherein the elements are part of a mobile terminal.

15. The apparatus of claim 12, wherein the elements are part of a Node B.

16. The apparatus of claim 12, wherein a period of the timer is less than or equal to N*(TTI/2), wherein N is the range of sequence numbers to be assigned to the data blocks, and TTI is the transmission time interval.

17. The apparatus of claim 12, wherein the data blocks are delivered to the higher entity in sequence.

18. The apparatus of claim 12, wherein the data block is a MAC-hs protocol data unit (PDU).

19. The apparatus of claim 12, wherein the higher entity is a MAC-d sub-layer.

20. The apparatus of claim 12, wherein the higher entity is a radio link control layer (RLC).

21. The method of claim 12, wherein the higher entity is a disassembly entity.

22. The apparatus of claim 12, wherein the components are for high-speed data packet access system.