PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

• US 20100116540A1
• Filed: 11/03/2009
• Published: 05/13/2010
• Est. Priority Date: 11/10/2008
• Status: Active Grant

• Current Assignee: Nitto Denko Corporation
• Original Assignee: Nitto Denko Corporation
• Inventors: NAITOU, Toshiki, HONJO, Mitsuru, ISHII, Jun
• Granted Patent: US 7,923,644 B2
• Time in Patent Office: Days
• US Class Current: 174/262
• CPC Class Codes: G11B 5/484 Integrated arm assemblies, e.g. formed by material deposition or by etching from single piece of metal or by lamination of materials forming a single arm/suspension/head unit
• CPC Class Codes: G11B 5/486 with provision for mounting or arranging electrical conducting means or circuits on or along the arm assembly
• CPC Class Codes: H05K 1/0228 Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors balanced signal pairs H05K1/0245
• CPC Class Codes: H05K 1/0245 Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
• CPC Class Codes: H05K 1/025 Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance H05K1/024 and H05K1/0243 take precedence; for semiconductor devices H01L23/66
• CPC Class Codes: H05K 1/0265 characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
• CPC Class Codes: H05K 1/056 the metal substrate being covered by an organic insulating layer
• CPC Class Codes: H05K 2201/09236 Parallel layout layout of balanced signal pairs H05K1/0245; superposed layout H05K2201/09672
• CPC Class Codes: H05K 2201/09254 Branched layout
• CPC Class Codes: H05K 2201/09509 Blind vias, i.e. vias having one side closed
• CPC Class Codes: H05K 2201/09554 Via connected to metal substrate
• CPC Class Codes: H05K 2201/09627 Special connections between adjacent vias, not for grounding vias redundant conductors or connections H05K2201/0979
• CPC Class Codes: H05K 2201/0979 Redundant conductors or connections, i.e. more than one current path between two points
• CPC Class Codes: H05K 2203/0323 Working metal substrate or core, e.g. by etching, deforming
• CPC Class Codes: H05K 3/06 the conductive material being removed chemically or electrolytically, e.g. by photo-etch process semi-additive methods H05K3/108
• CPC Class Codes: H05K 3/4685 Manufacturing of cross-over conductors
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base

Abstract

An end of a first line and an end of a second line of a first write wiring pattern are arranged on both sides of a third line of a second write wiring pattern. Circular connection portions are provided at the ends of the first line and the second line. In addition, through holes are formed in respective portions of a base insulating layer below the connection portions. Each connection portion comes in contact with a connecting region of a suspension body within the through hole.

Claims

1. A printed circuit board comprising:

an insulating layer;

first and second wiring patterns that are formed on one surface of said insulating layer and constitute a signal line pair; and

a first connecting layer that is provided on the other surface of said insulating layer, wherein

said first wiring pattern has first and second lines,

said second wiring pattern has third and fourth lines,

one ends of said first and second lines are electrically connected to each other and the other ends of said first and second lines are electrically connected to each other,

one ends of said third and fourth lines are electrically connected to each other and the other ends of said third and fourth lines are electrically connected to each other,

said first and second lines of said first wiring pattern and said third and fourth lines of said second wiring pattern are arranged such that any one of said first and second lines is located between said third and fourth lines and any one of said third and fourth lines is located between said first and second lines,

a first intersection region in which said first or second line of said first wiring pattern and said third or fourth line of said second wiring pattern intersect with each other is provided,

a second intersection region in which said first or second line of said first wiring pattern and said third or fourth line of said second wiring pattern intersect with each other is provided,

a portion of said first or second line of said first wiring pattern positioned in said first intersection region is divided, a portion of said third or fourth line of said second wiring pattern positioned in said first intersection region is arranged on said insulating layer to pass through a portion in between divided portions of said first or second line of the first wiring pattern,

said insulating layer has first and second through holes in said first intersection region, one of said divided portions of said first or second line of the first wiring pattern is electrically connected to said first connecting layer through said first through hole, and the other of said divided portions of said first or second line of the first wiring pattern is electrically connected to said first connecting layer through said second through hole.

2. The printed circuit board according to claim 1, further comprising a metal layer formed on the other surface of said insulating layer, wherein

said first connecting layer is composed of part of said metal layer and is electrically separated from other portions of said metal layer.

3. The printed circuit board according to claim 1, further comprising a second connecting layer provided on the other surface of said insulating layer, wherein

a portion of said third or fourth line of said second wiring pattern positioned in said second intersection region is divided, a portion of said first or second line of said first wiring pattern positioned in said second intersection region is arranged on said insulating layer to pass through a portion in between divided portions of said third or fourth line of said second wiring pattern,

said insulating layer has third and fourth through holes in said second intersection region, one of said divided portions of said third or fourth line of said second wiring pattern is electrically connected to said second connecting layer through said third through hole, and the other of said divided portions of said third or fourth line of said second wiring pattern is electrically connected to said second connecting layer through said fourth through hole.

4. The printed circuit board according to claim 3, further comprising a metal layer formed on the other surface of said insulating layer, wherein

said first connecting layer is composed of part of said metal layer and is electrically separated from other portions of said metal layer, and

said second connecting layer is composed of another part of said metal layer and is electrically separated from other portions of said metal layer.

5. The printed circuit board according to claim 1, further comprising:

a fifth line branched from the one end of said first line or the one end of said second line;

a sixth line branched from the other end of said first line or the other end of said second line;

a seventh line branched from the one end of said third line or the one end of said fourth line; and

an eighth line branched from the other end of said third line or the other end of said fourth line, wherein

a width of each of said fifth line and said sixth line is obtained by adding a width of said first line and a width of said second line, and a width of each of said seventh line and said eighth line is obtained by adding a width of said third line and a width of said fourth line.

6. A method of manufacturing a printed circuit board, comprising the steps of:

forming first and second wiring patterns constituting a signal line pair on one surface of an insulating layer; and

forming a connecting layer on the other surface of said insulating layer, wherein

the step of forming said first and second wiring patterns includes the steps of

forming first and second through holes in said insulating layer in a first intersection region, and

forming said first and second wiring patterns on said insulating layer such that said first wiring pattern is composed of first and second lines and said second wiring pattern is composed of third and fourth lines, said first and second lines of said first wiring pattern and said third and fourth lines of said second wiring pattern are arranged such that any one of said first and second lines is located between said third and fourth lines and any one of said third and fourth lines is located between said first and second lines, said first or second line of said first wiring pattern and said third or fourth line of said second wiring pattern intersect with each other in the first intersection region and said first or second line of said first wiring pattern and said third or fourth line of said second wiring pattern intersect with each other in a second intersection region, one ends of said first and second lines are electrically connected to each other, the other ends of said first and second lines are electrically connected to each other, one ends of said third and fourth lines are electrically connected to each other, the other ends of said third and fourth lines are electrically connected to each other, a portion of said first or second line of said first wiring pattern positioned in said first intersection region is divided, a portion of said third or fourth line of said second wiring pattern positioned in said first intersection region passes through a portion in between divided portions of said first or second line of said first wiring pattern on said insulating layer, one of said divided portions of said first or second line of said first wiring pattern is electrically connected to said connecting layer through said first through hole, and the other of said divided portions of said first or second line of said first wiring pattern is electrically connected to said connecting layer through said second through hole.