SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20100117074A1
• Filed: 11/04/2009
• Published: 05/13/2010
• Est. Priority Date: 11/07/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, SAKATA, Junichiro
• Granted Patent: US 8,395,148 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78669 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78678 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

It is an object to provide a highly reliable semiconductor device including a thin film transistor whose electric characteristics are stable. In addition, it is another object to manufacture a highly reliable semiconductor device at low cost with high productivity. In a semiconductor device including a thin film transistor, a semiconductor layer of the thin film transistor is formed with an oxide semiconductor layer to which a metal element is added. As the metal element, at least one of metal elements of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum is used. In addition, the oxide semiconductor layer contains indium, gallium, and zinc.

Claims

1. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer;

a first oxide semiconductor layer comprising a channel formation region, the first oxide semiconductor layer containing indium, gallium, and zinc;

a source electrode layer; and

a drain electrode layer,

wherein the first oxide semiconductor layer contains at least one metal element selected from the group consisting of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum.

2. The semiconductor device according to claim 1,

wherein the first oxide semiconductor layer comprises a first region and a second region,

wherein the first region comprises the metal element, and

wherein a thickness of the first region is smaller than a thickness of the second region.

3. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer comprises a first region and a third region,

wherein the first region comprises the metal element, and

wherein the third region is between the first region and the gate insulating layer.

4. The semiconductor device according to claim 1, further comprising:

a second oxide semiconductor layer between the first oxide semiconductor layer and the source electrode layer; and

a third oxide semiconductor layer between the first oxide semiconductor layer and the drain electrode layer,

wherein the second oxide semiconductor layer and the third oxide semiconductor layer each contain indium, gallium, and zinc.

5. The semiconductor device according to claim 4, wherein the second oxide semiconductor layer and the third oxide semiconductor layer each comprises a crystal grain.

6. The semiconductor device according to claim 4,

wherein the second oxide semiconductor layer serves as a source region, and

wherein the third oxide semiconductor layer serves as a drain region.

7. The semiconductor device according to claim 1, further comprising an insulating film covering the first oxide semiconductor layer and the source electrode layer and the drain electrode layer,

wherein the insulating film is in contact with the first oxide semiconductor layer.

8. The semiconductor device according to claim 1, wherein the source electrode layer and the drain electrode layer each contain at least one metal element selected from the group consisting of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum.

9. A semiconductor device comprising:

a gate electrode layer over a substrate having an insulating surface;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor layer comprising a channel formation region over the gate insulating layer, the first oxide semiconductor layer containing indium, gallium, and zinc; and

a source electrode layer and a drain electrode layer over the first oxide semiconductor layer,

wherein the first oxide semiconductor layer contains at least one metal element selected from the group consisting of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum.

10. The semiconductor device according to claim 9,

wherein the first oxide semiconductor layer has a first region and a second region,

wherein the first region comprises the metal element, and

wherein a thickness of the first region is smaller than a thickness of the second region.

11. The semiconductor device according to claim 9, wherein the first oxide semiconductor layer comprises a first region and a third region,

wherein the first region comprises the metal element, and

wherein the third region is between the first region and the gate insulating layer.

12. The semiconductor device according to claim 9, further comprising:

a second oxide semiconductor layer between the first oxide semiconductor layer and the source electrode layer; and

a third oxide semiconductor layer between the first oxide semiconductor layer and the drain electrode layer,

wherein the second oxide semiconductor layer and the third oxide semiconductor layer each contain indium, gallium, and zinc.

13. The semiconductor device according to claim 12, wherein the second oxide semiconductor layer and the third oxide semiconductor layer each comprises a crystal grain.

14. The semiconductor device according to claim 12,

wherein the second oxide semiconductor layer serves as a source region, and

wherein the third oxide semiconductor layer serves as a drain region.

15. The semiconductor device according to claim 9, further comprising an insulating film covering the first oxide semiconductor layer and the source electrode layer and the drain electrode layer,

wherein the insulating film is in contact with the first oxide semiconductor layer.

16. The semiconductor device according to claim 9, wherein the source electrode layer and the drain electrode layer each contain at least one metal element selected from the group consisting of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum.

17. A semiconductor device comprising:

a gate electrode layer over a substrate having an insulating surface;

a gate insulating layer over the gate electrode layer;

a source electrode layer and a drain electrode layer over the gate insulating layer; and

a first oxide semiconductor layer over the source electrode layer and the drain electrode layer, the first oxide semiconductor layer comprising a channel formation region and containing indium, gallium, and zinc,

wherein the first oxide semiconductor layer contains at least one metal element selected from the group consisting of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum.

18. The semiconductor device according to claim 17, wherein the first oxide semiconductor layer comprises a first region and a second region,

wherein the first region comprises the metal element, and

wherein the second region is between the first region and the gate insulating layer.

19. The semiconductor device according to claim 17, further comprising:

a second oxide semiconductor layer between the first oxide semiconductor layer and the source electrode layer; and

a third oxide semiconductor layer between the first oxide semiconductor layer and the drain electrode layer,

wherein the second oxide semiconductor layer and the third oxide semiconductor layer each contain indium, gallium, and zinc.

20. The semiconductor device according to claim 19, wherein the second oxide semiconductor layer and the third oxide semiconductor layer each comprises a crystal grain.

21. The semiconductor device according to claim 19,

wherein the second oxide semiconductor layer serves as a source region, and

wherein the third oxide semiconductor layer serves as a drain region.

22. The semiconductor device according to claim 17, further comprising an insulating film covering the first oxide semiconductor layer and the source electrode layer and the drain electrode layer,

wherein the insulating film is in contact with the first oxide semiconductor layer.

23. The semiconductor device according to claim 17, wherein the source electrode layer and the drain electrode layer each contain at least one metal element selected from the group consisting of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum.

24. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer; and

adding a metal element to a first region which is not covered with the source electrode layer or the drain electrode layer in the oxide semiconductor layer.

25. The method for manufacturing a semiconductor device according to claim 24,

wherein the metal element is not added to a second region in the oxide semiconductor layer, and

wherein the second region is between the first region and the gate insulating layer.

26. The method for manufacturing a semiconductor device according to claim 24, further comprising the step of forming an insulating film so as to cover the oxide semiconductor layer and the source electrode layer and drain electrode layer and so as to be in contact with the oxide semiconductor layer.

27. The method for manufacturing a semiconductor device according to claim 24, wherein the metal element is at least one selected from the group consisting of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum.

28. The method for manufacturing a semiconductor device according to claim 24, wherein the metal element is added by an ion implantation method.

29. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

adding a metal element to the oxide semiconductor layer; and

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer.

30. The method for manufacturing a semiconductor device according to claim 29,

wherein the metal element is added to a first region in the oxide semiconductor layer,

wherein the metal element is not added to a second region in the oxide semiconductor layer, and

wherein the second region is between the first region and the gate insulating layer.

31. The method for manufacturing a semiconductor device according to claim 29, further comprising the step of forming an insulating film so as to cover the oxide semiconductor layer and the source electrode layer and drain electrode layer and so as to be in contact with the oxide semiconductor layer.

32. The method for manufacturing a semiconductor device according to claim 29, wherein the metal element is at least one selected from the group consisting of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum.

33. The method for manufacturing a semiconductor device according to claim 29, wherein the metal element is added by an ion implantation method.

34. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming a source electrode layer and a drain electrode layer over the gate insulating layer;

forming an oxide semiconductor layer over the source electrode layer and the drain electrode layer; and

adding a metal element to the oxide semiconductor layer.

35. The method for manufacturing a semiconductor device according to claim 34,

wherein the metal element is added to a first region in the oxide semiconductor layer,

wherein the metal element is not added to a second region in the oxide semiconductor layer, and

wherein the second region is between the first region and the gate insulating layer.

36. The method for manufacturing a semiconductor device according to claim 34, further comprising the step of forming an insulating film so as to cover the oxide semiconductor layer and the source electrode layer and drain electrode layer and so as to be in contact with the oxide semiconductor layer.

37. The method for manufacturing a semiconductor device according to claim 34, wherein the metal element is at least one selected from the group consisting of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum.

38. The method for manufacturing a semiconductor device according to claim 34, wherein the metal element is added by an ion implantation method.