Memory Flash Apparatus and Method For Providing Device Upgrades Over A Standard Interface

• US 20100146159A1
• Filed: 12/05/2008
• Published: 06/10/2010
• Est. Priority Date: 12/05/2008
• Status: Active Grant

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Lerman, Mikhael
• Granted Patent: US 9,870,220 B2
• Time in Patent Office: Days
• US Class Current: 710/23
• CPC Class Codes: G06F 8/654 using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories

Abstract

An electronic device includes routing logic operatively coupled to a communication port that is externally accessible so that there is no need to disassemble the electronic device to gain access. The port may be a USB port and provides access to an internal bus. The routing logic is also operatively coupled to a memory subsystem such that it may route data from an external device, connected at the port, to the memory subsystem to modify or replace a boot code, including a BIOS code. A memory interface device includes an interface module, a memory interface module for communicating with a memory subsystem including a boot PROM, and a routing logic coupled to the interface module and the memory interface module. The routing logic routes data from the external device to the boot PROM, so that a boot code, including a BIOS, may be modified or replaced.

Claims

1. An electronic device comprising:

routing logic, operatively coupled to at least one communication port of said electronic device, said communication port being accessible externally from said electronic device, said communication port providing access to an internal bus of said electronic device, said routing logic also operatively coupled to a memory subsystem of said electronic device, said routing logic operative to route data to said memory subsystem in response to connection of an external device at said at least one communication port, said data for modifying or replacing a boot code stored within said memory subsystem.

2. The electronic device of claim 1, wherein said boot code is a Basic Input/Output System (BIOS) code.

3. The electronic device of claim 1, wherein said routing logic is further operable to receive a data packet from said external device, said data packet indicating that said external device is a PROM programming device, and in response to receiving said data packet, obtain exclusive control of said internal bus to enable programming commands to flow from said external device to said memory subsystem, said memory subsystem including a PROM.

4. The electronic device of claim 1, wherein said at least one communication port is a Universal Serial Bus (USB) port, wherein said internal bus includes a routing pathway from said USB port to said memory subsystem, and wherein said memory subsystem includes a flash type PROM.

5. An integrated circuit comprising the routing logic of claim 1.

6. The electronic device of claim 1, having said external device connected at said at least one communication port, wherein said external device is operable to indicate to said routing logic that said external device is a PROM programming device.

7. A memory interface device comprising:

an interface module having a communication port for communicating with an external device attached to said communication port;

a memory interface module for communicating with a memory subsystem including a boot Programmable Read Only Memory (PROM); and

a routing logic coupled to said interface module and said memory interface module, said routing logic operative to route data from said external device to said boot PROM, said data for modifying a boot code stored on said boot PROM.

8. The memory interface device of claim 7, wherein said boot code is a Basic Input/Output System (BIOS) code.

9. The memory interface device of claim 7, wherein said routing logic is further operable to receive a data packet from said external device, said data packet indicating that said external device is a PROM programming device, and in response to receiving said data packet, obtain control of an internal bus between said memory interface module and said memory subsystem, to enable programming commands to flow from said external device to said memory subsystem, said memory subsystem including said PROM.

10. The memory interface device of claim 9, wherein said communication port is a USB port, wherein said internal bus includes a routing pathway from said USB port to said memory subsystem, and wherein said PROM is a flash type PROM.

11. An integrated circuit comprising the memory interface device of claim 7.

12. A method comprising:

detecting a device at an interface port of an electronic device;

detecting, by a routing logic, that an external device, connected at a communication port of an electronic device, is a PROM programming device; and

routing data from said external device, to a memory subsystem of said electronic device, said data for modifying or replacing a boot code stored within said memory subsystem.

13. The method of claim 12, wherein routing data from said external device, to a memory subsystem of said electronic device, said data for modifying or replacing a boot code stored within said memory subsystem, comprises:

modifying or replacing said boot code wherein said boot code is a Basic Input/Output System (BIOS) code.

14. The method of claim 12, comprising:

receiving a data packet, by said routing logic, from said external device, said data packet indicating that said external device is a PROM programming device; and

obtaining, in response to receiving said data packet, exclusive control of an internal bus to enable programming commands to flow from said external device to said memory subsystem, said memory subsystem including a PROM.

15. The method of claim 12, wherein detecting, by a routing logic, that an external device, connected at a communication port of an electronic device, is a PROM programming device, further comprises:

detecting said external device at a USB port wherein said communication port is said USB port.

16. The method of claim 15, wherein routing data from said external device, to a memory subsystem of said electronic device, said data for modifying or replacing a boot code stored within said memory subsystem, further comprises:

routing data, by said routing logic, from said external device via said USB port and an internal bus that includes a routing pathway from said USB port to said memory subsystem, and wherein said memory subsystem includes a flash type PROM.

17. A computer readable memory comprising:

executable instructions for execution by at least one processor, that when executed cause said at least one processor to;

detect a device at an interface port of an electronic device;

detect that an external device, connected at a communication port of an electronic device including said at least one processor, is a PROM programming device; and

route data from said external device, to a memory subsystem of said electronic device, said data for modifying or replacing a boot code stored within said memory subsystem.

18. The computer readable memory of claim 17, wherein said executable instructions, when executed further cause the one or more processors to:

modify or replace said boot code wherein said boot code is a Basic Input/Output System (BIOS) code.

19. The computer readable memory of claim 17, wherein said executable instructions, when executed further cause the one or more processors to:

receive a data packet from said external device, said data packet indicating that said external device is a PROM programming device; and

obtain, in response to receiving said data packet, exclusive control of an internal bus to enable programming commands to flow from said external device to said memory subsystem, said memory subsystem including a PROM.

20. The computer readable memory of claim 17, wherein said executable instructions, when executed further cause the one or more processors to:

detect said external device at a USB port wherein said communication port is said USB port.

21. The computer readable memory of claim 20, wherein said executable instructions, when executed further cause the one or more processors to:

route data from said external device via said USB port and an internal bus that includes a routing pathway from said USB port to said memory subsystem, and wherein said memory subsystem includes a flash type PROM.