NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME

• US 20100207194A1
• Filed: 02/16/2010
• Published: 08/19/2010
• Est. Priority Date: 02/17/2009
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: FUJIWARA, Tomoko, KITO, Masaru, KIDOH, Masaru, KATSUMATA, Ryota, TANAKA, Hiroyasu, FUKUZUMI, Yoshiaki, AOCHI, Hideaki, MATSUNAMI, Junya, ISHIDUKI, Megumi, KIRISAWA, Ryouhei, KOMORI, Yosuke
• Granted Patent: US 8,436,414 B2
• Time in Patent Office: Days
• US Class Current: 257/324
• CPC Class Codes: H01L 29/66833 with a charge trapping gate insulator, e.g. MNOS transistors
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors
• CPC Class Codes: H10B 43/20 characterised by three-dimensional arrangements, e.g. with cells on different height levels
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels

Abstract

A nonvolatile semiconductor memory device includes: a semiconductor substrate; a stacked body provided on the semiconductor substrate, the stacked body having electrode films and insulating films being alternately stacked; a first and second semiconductor pillars; and a first and second charge storage layers. The first and second semiconductor pillars are provided inside a through hole penetrating through the stacked body in a stacking direction of the stacked body. The through hole has a cross section of an oblate circle, when cutting in a direction perpendicular to the stacking direction. The first and second semiconductor pillars face each other in a major axis direction of the first oblate circle. The first and second semiconductor pillars extend in the stacking direction. The first and second charge storage layers are provided between the electrode film and the first and second semiconductor pillars, respectively.

Claims

1. A nonvolatile semiconductor memory device comprising:

a semiconductor substrate;

a stacked body provided on the semiconductor substrate, the stacked body having electrode films and insulating films being alternately stacked;

a first semiconductor pillar and a second semiconductor pillar provided inside a first through hole penetrating through the stacked body in a stacking direction of the stacked body, the first through hole having a first cross section of a first oblate circle, the first cross section being cut in a direction perpendicular to the stacking direction, the first semiconductor pillar facing the second semiconductor pillar in a first major axis direction of the first oblate circle, the first semiconductor pillar and the second semiconductor pillar extending in the stacking direction;

a first charge storage layer provided between the electrode film and the first semiconductor pillar; and

a second charge storage layer provided between the electrode film and the second semiconductor pillar.

2. The device according to claim 1, further comprising

a first hole-dividing-insulating-layer provided between the first semiconductor pillar and the second semiconductor pillar.

3. The device according to claim 1, wherein a length of the first through hole in the first major axis direction is not less than 1.5 times and less than 3.0 times a length of the first through hole along a minor axis direction orthogonal to the first major axis direction.

4. The device according to claim 1, wherein a length of the first through hole in the first major axis direction is substantially twice a length of the first through hole along a minor axis direction orthogonal to the first major axis direction.

5. The device according to claim 4, wherein

a length of the first semiconductor pillar along the first major axis direction and a length of the second semiconductor pillar along the first major axis direction are substantially 0.75 times a length of the first through hole along the minor axis direction and

a distance between the first semiconductor pillar and the second semiconductor pillar is substantially 0.5 times a length of the first through hole along the minor axis direction.

6. The device according to claim 1, wherein a surface of the first semiconductor pillar along the stacking direction excluding a side facing the second semiconductor pillar of the first semiconductor pillar includes a curved surface concave on the side.

7. The device according to claim 1, wherein the electrode film is divided in a plane perpendicular to the stacking direction, an electric potential of a portion of the electrode film facing the first semiconductor pillar is different from an electric potential of a portion of the electrode film facing the second semiconductor pillar.

8. The device according to claim 1, wherein the first and second semiconductor pillars are electrically connected to each other on a side of the semiconductor substrate.

9. The device according to claim 1, further comprising:

a third semiconductor pillar and a fourth semiconductor pillar provided inside a second through hole adjacent to the first through hole in the first major axis direction, the second through hole penetrating through the stacked body in the stacking direction, the second through hole having a second cross section of a second oblate circle having a second major axis direction parallel to the first major axis direction, the second cross section being cut in the direction perpendicular to the stacking direction, the third semiconductor pillar facing the fourth semiconductor pillar in the second major axis direction, the third semiconductor pillar and the fourth semiconductor pillar extending in the stacking direction;

a third charge storage layer provided between the electrode film and the third semiconductor pillar;

a fourth charge storage layer provided between the electrode film and the fourth semiconductor pillar; and

a second hole-dividing-insulating-layer provided between the third semiconductor pillar and the fourth semiconductor pillar.

10. The device according to claim 9, wherein a distance between the first through hole and the second through hole along the first major axis direction is substantially equal to a length of the first through hole along a minor axis direction orthogonal to the first major axis direction.

11. The device according to claim 9, further comprising:

a fifth semiconductor pillar and a sixth semiconductor pillar provided inside a third through hole adjacent to the first through hole in a minor axis direction perpendicular to the first major axis direction, the third through hole penetrating through the stacked body in the stacking direction, the third through hole having a third cross section of a third oblate circle having a third major axis direction parallel to the first major axis direction, the third cross section being cut in the direction perpendicular to the stacking direction, the fifth semiconductor pillar facing the sixth semiconductor pillar in the third major axis direction, the fifth semiconductor pillar and the sixth semiconductor pillar extending in the stacking direction;

a fifth charge storage layer provided between the electrode film and the fifth semiconductor pillar; and

a sixth charge storage layer provided between the electrode film and the sixth semiconductor pillar.

12. The device according to claim 11, wherein a distance between the first through hole and the third through hole along the minor axis direction is substantially equal to a length of the first through hole along the minor axis direction.

13. The device according to claim 9, wherein the electrode film is divided in a plane perpendicular to the stacking direction, a portion of the electrode film facing the first semiconductor pillar and a portion of the electrode film facing the fourth semiconductor pillar are set at a first electric potential, and a portion of the electrode film facing the second semiconductor pillar and a portion of the electrode film facing the third semiconductor pillar are set at a second electric potential different from the first electric potential.

14. The device according to claim 9, wherein the electrode film is divided in a plane perpendicular to the stacking direction, a portion of the electrode film facing the first semiconductor pillar is set at a first electric potential, a portion of the electrode film facing the second semiconductor pillar and a portion of the electrode film facing the third semiconductor pillar are set at a second electric potential different from the first electric potential, and a portion of the electrode film facing the fourth semiconductor pillar is set at a third electric potential different from both the first electric potential and the second electric potential.

15. The device according to claim 1, further comprising:

a third semiconductor pillar and a fourth semiconductor pillar provided inside a second through hole adjacent to the first through hole in the first major axis direction, the second through hole penetrating through the stacked body in the stacking direction, the second through hole having a second cross section of a second oblate circle having a second major axis direction parallel to the first major axis direction, the second cross section being cut in a direction perpendicular to the stacking direction, the third semiconductor pillar facing the fourth semiconductor pillar in the second major axis direction, the third semiconductor pillar and the fourth semiconductor pillar extending in the stacking direction;

a third charge storage layer provided between the electrode film and the third semiconductor pillar;

a fourth charge storage layer provided between the electrode film and the fourth semiconductor pillar;

a first selection gate transistor provided at an end portion on a side of the first and second semiconductor pillars opposite to the semiconductor substrate and having a first threshold;

a second selection gate transistor provided between the first selection gate transistor and the stacked body with respect to the first and second semiconductor pillars and having a second threshold different from the first threshold;

a third selection gate transistor provided at an end portion on a side of the third and fourth semiconductor pillars opposite to the semiconductor substrate and having a third threshold same as the second threshold; and

a fourth selection gate transistor provided between the third selection gate transistor and the stacked body with respect to the third and fourth semiconductor pillars and having a fourth threshold same as the first threshold.

16. The device according to claim 15, wherein the first threshold and the fourth threshold are lower than the second threshold and the third threshold.

17. The device according to claim 1 further comprising:

a third semiconductor pillar and a fourth semiconductor pillar provided inside a second through hole adjacent to the first through hole in the first major axis direction, the second through hole penetrating through the stacked body in the stacking direction, the second through hole having a second cross section of a second oblate circle having a second major axis direction parallel to the first major axis direction, the second cross section being cut in a direction perpendicular to the stacking direction, the third semiconductor pillar facing the fourth semiconductor pillar in the second major axis direction, the third semiconductor pillar and a fourth semiconductor pillar extending in the stacking direction;

a third charge storage layer provided between the electrode film and the third semiconductor pillar;

a fourth charge storage layer provided between the electrode film and the fourth semiconductor pillar; and

an inter-hole-dividing-insulating-film dividing the electrode film into a region facing the first through hole and a region facing the second through hole between the first through hole and the second through hole.

18. The device according to claim 17, wherein a length of the inter-hole-dividing-insulating-film along the major axis direction is substantially 0.5 times a length of the first through hole along a minor axis direction orthogonal to the first major axis direction.

19. The device according to claim 18, wherein a length of the first through hole in the first major axis direction is not less than 1.5 times and less than 3.times a length of the first through hole along the minor axis direction.

20. A method for manufacturing a nonvolatile semiconductor memory device comprising:

forming a stacked body by alternately stacking an insulating film and an electrode film on a substrate;

forming a through hole penetrating through the stacked body in a stacking direction of the stacked body, a through hole having a cross section of an oblate circle, the cross section being cut in a direction perpendicular to the stacking direction;

burying a semiconductor material in a remaining space of the through hole after forming a layer including a charge storage layer on an inner wall of the through hole;

forming a slit dividing the stacked body, the layer including the charge storage layer, and the semiconductor material in a plane including a direction perpendicular to a major axis direction of the oblate circle of the through hole and the stacking direction of the stacked body;

form a hole-dividing-insulating-layer made of a insulating material by burying the insulating material in the slit, the insulating material having an etching rate lower than an etching rate of a surface insulating film on a surface above the stacked body,

recessing a surface of the surface insulating film by etching the surface insulating film from an upper surface of the hole-dividing-insulating-layer; and

burying a conductive material in a space formed by the recessing.