PACKAGED DEVICE AND PRODUCING METHOD THEREOF

• US 20100218977A1
• Filed: 01/15/2010
• Published: 09/02/2010
• Est. Priority Date: 02/27/2009
• Status: Active Grant

• Current Assignee: DRNC Holdings, Inc. (InterDigital, Inc.)
• Original Assignee: Fujitsu Limited
• Inventors: Inoue, Hiroaki, Katsuki, Takashi, Nakazawa, Fumihiko
• Granted Patent: US 8,283,735 B2
• Time in Patent Office: Days
• US Class Current: 174/250
• CPC Class Codes: B32B 2309/027 Ambient temperature
• CPC Class Codes: B32B 2309/68 Vacuum
• CPC Class Codes: B32B 2310/0806 using electromagnetic radiation
• CPC Class Codes: B32B 2457/00 Electrical equipment
• CPC Class Codes: B32B 37/12 characterised by using adhesives
• CPC Class Codes: B81B 2207/096 through the substrate
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B81C 2203/019 characterised by the material or arrangement of seals between parts
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A packaged device includes a device substrate and a packaging unit. The device substrate includes a first surface and a device formed in the device substrate. The packaging unit includes an insulating layer which faces the device substrate. The insulating layer includes a second surface bonded to the first surface. A metal concentration of at least part of a peripheral surface in the insulating layer is higher than a metal concentration of an end surface on the device substrate side in the insulating layer. An outline of the first surface is retreated inward from an outline of the second surface.

Claims

1. A packaged device comprising:

a device substrate including a first surface and a device formed in the device substrate; and

a packaging unit including an insulating layer facing the device substrate, the insulating layer including a second surface bonded to the first surface,

wherein a metal concentration of at least part of a peripheral surface in the insulating layer is higher than a metal concentration of an end surface of the insulating layer on a side facing the device substrate, and

an outline of the first surface is retreated inward from an outline of the second surface.

2. The packaged device according to claim 1, wherein a length by which the outline of the first surface is retreated inward from the outline of the second surface is 10 μ

m or more.

3. The packaged device according to claim 1, wherein the device substrate includes a partial structure including a third surface bonded to the second surface, and

an outline of the third surface is retreated inward from the outline of the second surface.

4. The packaged device according to claim 3, wherein a length by which the outline of the third surface is retreated inward from the outline of the second surface is 10 μ

m or more.

5. The packaged device according to claim 1, wherein the insulating layer has a thickness of 50 nm or more.

6. A method for fabricating a packaged device comprising:

preparing a device substrate including a first surface and a device formed in the device substrate;

preparing a packaging unit including an insulating layer with a second surface to be bonded to the first surface; and

bonding the first surface and the second surface by a room-temperature bonding method,

wherein the first surface and the second surface are bonded to each other such that an outline of the first surface is retreated inward from an outline of the second surface.

7. The method according to claim 6, wherein a length by which the outline of the first surface is retreated inward from the outline of the second surface is 10 μ

m or more.

8. The method according to claim 6, wherein the insulating layer has a thickness of 50 nm or more.