OPTIMIZED TRANSFER OF PACKETS IN A RESOURCE CONSTRAINED OPERATING ENVIRONMENT

• US 20100241816A1
• Filed: 10/05/2009
• Published: 09/23/2010
• Est. Priority Date: 03/19/2009
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Grubb, Jared S., Woods, Gregory K., Dolter, James William, Ganapathy, Chinnappa K., Bica, Vito R.
• Granted Patent: US 8,612,693 B2
• Time in Patent Office: Days
• US Class Current: 711/154
• CPC Class Codes: H04L 49/00 Packet switching elements
• CPC Class Codes: H04L 49/901 using storage descriptor, e.g. read or write pointers

Abstract

An apparatus includes first and second components, a memory, and an allocator configured to allocate a portion of the memory to the first component, wherein the first component is configured to access the allocated portion of the memory and to send information to the second component to provide the second component with access to the allocated portion of the memory.

Claims

1. An apparatus, comprising:

first and second components;

a memory; and

an allocator configured to allocate a portion of the memory to the first component;

wherein the first component is configured to access the allocated portion of the memory and to send information to the second component to provide the second component with access to the allocated portion of the memory.

2. The apparatus of claim 1 wherein the allocator is further configured to determine location and size of the portion of the memory allocated to the first component.

3. The apparatus of claim 1 wherein the allocator allocates the portion of the memory to the first component by sending the first component the information.

4. The apparatus of claim 1 wherein the first component sends data to the second component by writing the data to the allocated portion of the memory.

5. The apparatus of claim 1 wherein the first component surrenders access to the allocated portion of the memory by sending the information to the second component.

6. The apparatus of claim 1 wherein the information comprises location and size of the portion of the memory allocated to the first component.

7. The apparatus of claim 1 wherein the allocator is further configured to map the first component to the portion of the memory allocated to the first component.

8. The apparatus of claim 1 wherein the allocator is further configured to allocate portions of the remaining memory to other components.

9. The apparatus of claim 8 further comprising a configuration manager configured to initialize the allocator to initially define by location and size the portion of the memory allocated to the first component and the portions of the remaining memory allocated to the other components.

10. The apparatus of claim 9 wherein the allocator is further configured to change the location and size of the portion of the memory allocated to the first component and the portions of the remaining memory allocated to the other components.

11. The apparatus of claim 1 wherein one of the first and second components comprises a hardware subsystem and the other one of the first and second components comprises a platform for executing software.

12. The apparatus of claim 11 wherein the hardware subsystem comprises a component configured for physical layer processing and the platform for executing software comprises a central processing unit.

13. An apparatus, comprising:

means for allocating a portion of the memory to a first component;

means for accessing the allocated portion of the memory by the first component; and

means for sending information from the first component to the second component to provide the second component with access to the allocated portion of the memory.

14. The apparatus of claim 13 further comprising means for determining location and size of the portion of the memory allocated to the first component.

15. The apparatus of claim 13 wherein the means for allocating a portion of the memory to the first component allocates the portion of the memory by sending the first component the information.

16. The apparatus of claim 13 further comprising means for sending data from the first component to the second component, wherein the data is sent by the first component writing the data to the allocated portion of the memory.

17. The apparatus of claim 13 further comprising means for surrendering access to the allocated portion of the memory by sending the information to the second component.

18. The apparatus of claim 13 wherein the information comprises location and size of the portion of the memory allocated to the first component.

19. The apparatus of claim 13 further comprising means for mapping the first component to the portion of the memory allocated to the first component.

20. The apparatus of claim 13 further comprising means for allocating portions of the remaining memory to other components.

21. The apparatus of claim 20 further comprising means for initially defining by location and size the portion of the memory allocated to the first component and the portions of the remaining memory allocated to the other components.

22. The apparatus of claim 21 further comprising means for changing the location and size of the portion of the memory allocated to the first component and the portions of the remaining memory allocated to the other components.

23. The apparatus of claim 13 wherein one of the first and second components comprises a hardware subsystem and the other one of the first and second components comprises a platform for executing software.

24. The apparatus of claim 13 wherein the hardware subsystem comprises a component configured for physical layer processing and the platform for executing software comprises a central processing unit.

25. A method of sharing memory between first and second components, comprising:

allocating a portion of the memory to the first component;

accessing the allocated portion of the memory by the first component; and

sending information from the first component to the second component to provide the second component with access to the allocated portion of the memory.

26. The method of claim 25 further comprising determining location and size of the portion of the memory allocated to the first component.

27. The method of claim 25 wherein the portion of the memory is allocated to the first component by sending the first component the information.

28. The method of claim 25 further comprising sending data from the first component to the second component, wherein the data is sent by the first component writing the data to the allocated portion of the memory.

29. The apparatus of claim 25 wherein the first component surrenders access to the allocated portion of the memory by sending the information to the second component.

30. The method of claim 25 wherein the information comprises location and size of the portion of the memory allocated to the first component.

31. The method of claim 25 further comprising mapping the first component to the portion of the memory allocated to the first component.

32. The method of claim 25 further comprising allocating portions of the remaining memory to other components.

33. The method of claim 32 further comprising initially defining by location and size the portion of the memory allocated to the first component and the portions of the remaining memory allocated to the other components.

34. The method of claim 33 further comprising changing the location and size of the portion of the memory allocated to the first component and the portions of the remaining memory allocated to the other components.

35. The method of claim 25 wherein one of the first and second components comprises a hardware subsystem and the other one of the first and second components comprises a platform for executing software.

36. The method of claim 25 wherein the hardware subsystem comprises a component configured for physical layer processing and the platform for executing software comprises a central processing unit.

37. A computer-program product for enabling first and second components to share memory, comprising:

computer-readable medium comprising codes executable by at least one processor to;

allocate a portion of the memory to the first component to enable the first component to access the allocated portion of the memory, and enable the second component to access the allocated portion of the memory after the first component sends information to the second component.

38. A headset, comprising:

first and second components;

a memory; and

an allocator configured to allocate a portion of the memory to the first component;

wherein the first component is configured to access the allocated portion of the memory and to send information to the second component to provide the second component with access to the allocated portion of the memory; and

wherein the first or second component comprises a transducer.

39. A watch comprising:

first and second components;

a memory; and

an allocator configured to allocate a portion of the memory to the first component;

wherein the first component is configured to access the allocated portion of the memory and to send information to the second component to provide the second component with access to the allocated portion of the memory; and

wherein the first or second component comprises a user interface

40. A sensing device, comprising:

first and second components;

a memory; and

an allocator configured to allocate a portion of the memory to the first component;

wherein the first component is configured to access the allocated portion of the memory and to send information to the second component to provide the second component with access to the allocated portion of the memory; and

wherein the first or second component comprises a sensor.