SYSTEMS AND METHOD FOR DATA SURVIVABILITY

• US 20100250057A1
• Filed: 03/31/2009
• Published: 09/30/2010
• Est. Priority Date: 03/31/2009
• Status: Active Grant

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Steffler, Joseph Bernard
• Granted Patent: US 8,234,461 B2
• Time in Patent Office: Days
• US Class Current: 701/35
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G06F 11/2071 using a plurality of controllers

Abstract

Systems and a method for storing data are provided. The protected memory system includes a memory array including a plurality of memory modules each separately located with respect to each other and a memory controller configured to receive data to be stored from the data acquisition unit, store the received data in corresponding memory locations in each of the plurality of memory modules wherein the stored data including error checking information, read data from a first one of the plurality of memory modules until a data error is detected at a first memory location, read data from a second memory location of a second one of the plurality of memory modules wherein the data read from the second memory location corresponds to the data read from the first memory location, and replace the data read from the first memory location with the data read from the second memory location.

Claims

1. A protected memory system for storing data for recovery after an off-normal event, said system comprising:

a memory array comprising a plurality of memory modules each separately located with respect to each other;

a memory controller communicatively coupled to a data acquisition unit and to each of the plurality of memory modules, said controller configured to;

receive data to be stored from said data acquisition unit;

store the received data in corresponding memory locations in each of the plurality of memory modules, the stored data including error checking information;

read data from a first one of the plurality of memory modules until a data error is detected at a first memory location;

read data from a second memory location of a second one of the plurality of memory modules wherein the data read from the second memory location corresponds to the data read from the first memory location; and

replace the data read from the first memory location with the data read from the second memory location.

2. A protected memory system in accordance with claim 1 wherein the data stored in one memory module of the plurality of memory modules is redundant of the received data stored in any of the others of the plurality of memory modules.

3. A protected memory system in accordance with claim 1 wherein said plurality of memory modules are separated a predetermined distance apart in a single enclosure.

4. A protected memory system in accordance with claim 3 wherein said single enclosure comprises a crash-protected enclosure.

5. A protected memory system in accordance with claim 1 wherein the first memory location from the first one of the plurality of memory modules has the same address as the second memory location in the second one of the plurality of memory modules.

6. A protected memory system in accordance with claim 1 wherein said controller is configured to output

read data from a third memory location in subsequent ones of said plurality of memory modules that correspond to the first memory location until data read from the third memory location is error-free;

and

replace the data read from the first memory location with the data read from the third memory location.

7. A protected memory system in accordance with claim 1 wherein the off-normal event comprises at least one of a high temperature event, a shock event, and a moisture event.

8. A protected memory system in accordance with claim 1 wherein said controller is configured to output only data that is error-free.

9. A protected memory system in accordance with claim 1 wherein said controller is configured to store data in said first of said plurality of memory modules that is a mirror-image of the stored data in each other of said plurality of memory modules.

10. A method of storing and retrieving data from a protected memory system, said method comprising:

storing identical copies of a series of data packets in corresponding memory locations in a plurality of memory modules, each memory module separate from at least one other memory module, each memory module storing one or more copies of the series of data packets;

reading the series of data packets from one of the plurality of memory modules until an error in the data packet is detected;

reading a data packet from another of the plurality of memory modules that corresponds to the data packet having the detected error; and

outputting the error-free series of data packets.

11. A method in accordance with claim 10 wherein storing identical copies of a series of data packets comprises:

writing a series of data packets comprising an error-checking portion into respective memory locations in a first memory module of an array of a plurality of memory modules; and

writing the series of data packets into respective memory locations in other memory modules of the array of memory modules.

12. A method in accordance with claim 10 wherein reading the series of data packets comprises reading the series of data packets from the respective memory locations in the first memory module until an error in the data packet is detected.

13. A method in accordance with claim 10 wherein reading a data packet from another of the plurality of memory modules comprises sequentially reading a memory location in the others of the memory modules that corresponds to the data packet having the error until an error-free data packet is read.

14. A method in accordance with claim 10 further comprising continuing to read the series of data packets from the respective memory locations in the first memory module until a next error in a data packet is detected.

15. A method in accordance with claim 10 further comprising reading the series of data packets from the respective memory locations in the memory module in which the error-free data packet was read.

16. A flight data recorder comprising:

a data acquisition unit configured to receive a plurality of data signals and to generate a series of data packets for storage, at least one of the data packets in the series comprising an error-checking portion;

a crash-protected memory comprising a memory array of a plurality of memory modules each separately located with respect to each other; and

a memory controller communicatively coupled to said data acquisition unit and to each of the plurality of memory modules, said controller configured to;

store identical copies of the series of data packets in corresponding memory locations in the plurality of memory modules, each memory module separate from at least one other memory module, each memory module storing one or more copies of the series of data packets;

read the series of data packets from one of the plurality of memory modules until an error in the data packet is detected;

read a data packet from another of the plurality of memory modules that corresponds to the data packet having the detected error; and

output the error-free series of data packets.

17. A flight data recorder in accordance with claim 16 wherein said crash-protected memory includes and enclosure configured to preserve the crash-protected memory during an off-normal event comprising at least one of a high temperature event, a shock event, and a moisture event.

18. A flight data recorder in accordance with claim 17 wherein the at least one of a high temperature event, a shock event, and a moisture event is associated with a crash of an aircraft.

19. A flight data recorder in accordance with claim 16 wherein the high temperature event is associated with a fire.

20. A flight data recorder in accordance with claim 16 wherein said plurality of memory modules are separated a predetermined distance apart in a single enclosure.