LIGHT-EMITTING DIODE PACKAGE AND WAFER-LEVEL PACKAGING PROCESS OF LIGHT-EMITTING DIODE

• US 20100258827A1
• Filed: 05/20/2009
• Published: 10/14/2010
• Est. Priority Date: 04/09/2009
• Status: Active Grant

• Current Assignee: Lextar Electronics Corporation
• Original Assignee: Lextar Electronics Corporation
• Inventors: Kuo, Cheng-Ta, Lee, Chia-En, Hsia, Der-Ling
• Granted Patent: US 8,278,681 B2
• Time in Patent Office: Days
• US Class Current: 257/98
• CPC Class Codes: H01L 24/26 Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/93 Batch processes
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01047 Silver [Ag]
• CPC Class Codes: H01L 2924/01049 Indium [In]
• CPC Class Codes: H01L 2924/0105 Tin [Sn]
• CPC Class Codes: H01L 2924/01074 Tungsten [W]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/486 adapted for surface mounting
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/642 characterized by the shape

Abstract

A wafer-level packaging process of a light-emitting diode is provided. First, a semiconductor stacked layer is formed on a growth substrate. A plurality of barrier patterns and a plurality of reflective layers are then formed on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns. A first bonding layer is then formed on the semiconductor stacked layer to cover the barrier patterns and the reflective layers. Thereafter, a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other is provided, and the first bonding layer is bonded with the second bonding layer. The semiconductor stacked layer is then separated from the growth substrate. Next, the semiconductor stacked layer is patterned to form a plurality of semiconductor stacked patterns. Next, each semiconductor stacked pattern is electrically connected to the conductive plug.

Claims

1. A wafer-level packaging process of a light-emitting diode (LED), comprising:

forming a semiconductor stacked layer on a growth substrate;

forming a plurality of barrier patterns on the semiconductor stacked layer;

forming a plurality of reflective layers on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns respectively;

forming a first bonding layer on the semiconductor stacked layer to cover the barrier patterns and the reflective layers;

providing a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other;

bonding the first bonding layer with the second bonding layer;

separating the semiconductor stacked layer from the growth substrate;

patterning the semiconductor stacked layer to form a plurality of patterned semiconductor stacked layers;

electrically connecting each of the patterned semiconductor stacked layers to one of the conductive plugs respectively; and

forming an encapsulant on the carrying substrate to cover the patterned semiconductor stacked layers.

2. The wafer-level packaging process of the LED as claimed in claim 1, wherein a method of forming the semiconductor stacked layer comprises:

forming a first-type doped semiconductor layer on the growth substrate;

forming a light-emitting layer on the first-type doped semiconductor layer; and

forming a second-type doped semiconductor layer on the light-emitting layer.

3. The wafer-level packaging process of the LED as claimed in claim 1, wherein a material of the barrier pattern comprises silicon oxide, silicon nitride or indium tin oxide.

4. The wafer-level packaging process of the LED as claimed in claim 1, wherein a method of forming the barrier pattern comprises performing a thin-film deposition method, a photolithography process, and an etching process.

5. The wafer-level packaging process of the LED as claimed in claim 1, wherein a material of the reflective layer comprises silver.

6. The wafer-level packaging process of the LED as claimed in claim 1, wherein a method of forming the reflective layer comprises evaporation or sputtering.

7. The wafer-level packaging process of the LED as claimed in claim 1, wherein a material of the first bonding layer comprises titanium, tungsten, titanium tungsten, nickel, platinum, aurum, aurum tin alloy, indium, or combinations thereof.

8. The wafer-level packaging process of the LED as claimed in claim 1, wherein a method of forming the first bonding layer comprises evaporation or sputtering.

9. The wafer-level packaging process of the LED as claimed in claim 1, wherein a method of separating the semiconductor stacked layer from the growth substrate comprises a laser lift-off process, a wet etching process, a grinding process, or a polishing process.

10. The wafer-level packaging process of the LED as claimed in claim 1, wherein the first bonding layer and the barrier pattern are patterned when the semiconductor stacked layer is patterned to form a plurality of the patterned semiconductor stacked layers.

11. The wafer-level packaging process of the LED as claimed in claim 1, wherein a method of electrically connecting each of the patterned semiconductor stacked layers and the carrying substrate comprises:

forming a dielectric layer on each of the patterned semiconductor stacked layers, wherein the dielectric layer at least covers a sidewall of the patterned semiconductor stacked layer; and

forming a plurality of bridge wires on the carrying substrate and the dielectric layer, wherein the bridge wires are electrically connected to the carrying substrate and each of the patterned semiconductor stacked layers.

12. The wafer-level packaging process of the LED as claimed in claim 1, wherein the encapsulant is entirely or partially formed on the carrying substrate to cover the patterned semiconductor stacked layers.

13. The wafer-level packaging process of the LED as claimed in claim 1, wherein a light conversion layer is first formed to cover the patterned semiconductor stacked layers before the encapsulant is formed.

14. The wafer-level packaging process of the LED as claimed in claim 1, further comprising dividing the carrying substrate to singularize the LEDs.

15. A light-emitting diode (LED) package, comprising:

at least a patterned semiconductor stacked layer having a top surface and a bottom surface;

a reflective layer disposed on the bottom surface;

a barrier pattern disposed on the bottom surface and surrounding the reflective layer;

a first bonding layer disposed on the bottom surface to cover the barrier pattern and the reflective layer;

a carrying substrate comprising;

a conductive substrate having at least a through hole;

an insulating layer disposed on a sidewall of the through hole;

at least a conductive plug disposed in the through hole and electrically insulated to the conductive substrate; and

a second bonding layer disposed on the conductive substrate, wherein the second bonding layer is electrically connected to the bottom surface through the first bonding layer;

at least a bridge conductor electrically connected to the top surface and the conductive plug; and

an encapsulant disposed on the carrying substrate to cover the patterned semiconductor stacked layers.

16. The LED package as claimed in claim 15, wherein a material of the barrier pattern comprises silicon oxide, silicon nitride or indium tin oxide.

17. The LED package as claimed in claim 15, wherein a material of the reflective layer comprises silver.

18. The LED package as claimed in claim 15, wherein a material of the first bonding layer comprises titanium, tungsten, titanium tungsten, nickel, platinum, aurum, aurum tin alloy, indium, or combinations thereof.

19. The LED package as claimed in claim 15, wherein the carrying substrate further comprises a pad, wherein the pad is electrically connected to the top surface through the conductive plug and the bridge conductor, and the pad is electrically insulated to the conductive substrate.

20. The LED package as claimed in claim 19, wherein the pad and the patterned semiconductor stacked layer are respectively located at two opposite sides of the conductor substrate.

21. The LED package as claimed in claim 15, further comprising a dielectric layer, wherein the dielectric layer is disposed on a sidewall of the patterned semiconductor stacked layer, and is located between the patterned semiconductor stacked layer and the bridge conductor.

22. The LED package as claimed in claim 15, wherein the carrying substrate further comprises a heat sink, wherein the heat sink is disposed on the conductive substrate, and the heat sink and the patterned semiconductor stacked layer are respectively located at two opposite sides of the conductive substrate.

23. The LED package as claimed in claim 15, further comprising a light conversion layer covering the patterned semiconductor stacked layers.