MEMORY SYSTEM WITH DATA LINE SWITCHING SCHEME

• US 20100265750A1
• Filed: 09/20/2009
• Published: 10/21/2010
• Est. Priority Date: 04/20/2009
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk 3D LLC (Western Digital Corporation)
• Inventors: Fasoli, Luca, Yan, Tianhong
• Granted Patent: US 8,279,650 B2
• Time in Patent Office: Days
• US Class Current: 365/51
• CPC Class Codes: G11C 13/0064 Verifying circuits or methods
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 2013/0066 Verify correct writing whilst writing is in progress, e.g. by detecting onset or cessation of current flow in cell and using the detector output to terminate writing
• CPC Class Codes: G11C 8/12 Group selection circuits, e.g. for memory block selection, chip selection, array selection

Abstract

A storage system includes a three-dimensional memory array that has multiple layers of non-volatile storage elements grouped into blocks. Each block includes a subset of first selection circuits for selectively coupling a subset of array lines (e.g. bit lines) of a first type to respective local data lines. Each block includes a subset of second selection circuits for selectively coupling a subset of the respective local data lines to global data lines that are connected to control circuitry. To increase the performance of memory operations, the second selections circuits can change their selections independently of each other. For example, a memory operation is performed concurrently on a first non-volatile storage element of each group of a plurality of groups of non-volatile storage elements. Completion of the memory operation for the first non-volatile storage element of each group is independently detected. A memory operation on a second non-volatile storage element of each group is independently commenced for each group upon independently detecting completion of the memory operation for the first non-volatile storage element of the respective group.

Claims

1. A non-volatile storage device, comprising:

a plurality of non-volatile storage elements;

one or more control circuits that perform memory operations; and

a first set of selection circuits, each selection circuit of the first set of selection circuits is in communication with the one or more control circuits and a different group of two or more of the non-volatile storage elements so that during memory operations each selection circuit of the first set of selection circuits selectively connects a respective first non-volatile storage element of the group to the one or more control circuits until a memory operation completes for the first non-volatile storage element of the group and then selectively connects a second non-volatile storage element of the group to the one or more control circuits independent of other selection circuits of the first set of selection circuits.

2. The non-volatile storage device of claim 1, wherein:

the one or more control circuits include sense amplifier circuits;

the sense amplifier circuits determine, independently for each non-volatile storage element being monitored, that the memory operation completes and outputs a signal in response to determining that the memory operation completes; and

the first set of selections circuits include multiplexer circuits that each receive the signal from one of the sense amplifier circuits and switch connections from the first non-volatile storage element of the group to the second non-volatile storage element of the group.

3. The non-volatile storage device of claim 1, wherein:

when the respective first non-volatile storage element of a group of non-volatile storage elements is connected to the one or more control circuits, the one or more control circuits SET the resistance of the respective first non-volatile storage element of the group by discharging a charge through the respective first non-volatile storage element of the group.

4. The non-volatile storage device of claim 1, further comprising:

control lines in communication with the non-volatile storage elements, the non-volatile storage elements are arranged as sets of non-volatile storage elements;

multiple sets of local data lines, each set of non-volatile storage elements includes its own set of local data lines;

a set of global data lines, the control circuits are in communication with the global data lines; and

a second set of selection circuits, each set of non-volatile storage elements includes a different subset of the second set selection circuits for selectively connecting a subset of the control lines to local data lines for the respective set of non-volatile storage elements, the first set of selection circuits selectively connect the local data lines to the global data lines.

5. The non-volatile storage device of claim 4, wherein:

each selection circuit of the first set of selection circuits is in communication with a different group of two or more of the local data lines and one of the global data lines so that during memory operations each selection circuit of the first set of selection circuits selectively connects a respective first local data line to one global data line until the memory operation completes for the first non-volatile storage elements of the group and then selectively connects a second local data line to the one global data line independent of other selection circuits of the first set of selection circuits.

6. The non-volatile storage device of claim 5, wherein:

the one or more control circuits include sense amplifier circuits;

the sense amplifier circuits determine, independently for each non-volatile storage element being monitored, that the memory operation completes and outputs a signal in response to determining that the memory operation completes; and

the first set of selections circuits include multiplexer circuits that each receive and switch connections between local data lines in response to the signal from one of the sense amplifier circuits.

7. The non-volatile storage device of claim 4, wherein:

when the respective first non-volatile storage element of a group non-volatile storage elements is connected to the one or more control circuits, the one or more control circuits SET the resistance of the respective first non-volatile storage element of the group by discharging a capacitive charge through the respective first non-volatile storage element of the group.

8. The non-volatile storage device of claim 4, wherein:

the control lines are positioned within the plurality of non-volatile storage elements;

the local data lines are outside the plurality of non-volatile storage element; and

the global data lines are positioned outside of the plurality of non-volatile storage elements.

9. The data storage system of claim 8, wherein:

the local data lines are positioned in at least one metal layer below the plurality of non-volatile storage elements; and

the global data lines are positioned in at least one metal layer above the plurality of non-volatile storage elements.

10. The data storage system of claim 9, wherein:

the control circuitry is positioned on a surface of a substrate;

the plurality of non-volatile storage elements comprise a monolithic three-dimensional memory array positioned above the surface of the substrate and above the control circuitry;

the local data lines are positioned between the monolithic three-dimensional memory array and the surface of the substrate; and

the global data lines are positioned above the monolithic three-dimensional memory array and the surface of the substrate.

11. The data storage system of claim 1, wherein:

the control circuitry is positioned on a surface of a substrate; and

the plurality of non-volatile storage elements comprise a monolithic three-dimensional memory array positioned above the surface of the substrate and above the control circuitry;

12. The data storage system of claim 1, wherein:

each non-volatile storage elements of the plurality of non-volatile storage elements includes a reversible resistance-switching element.

13. A non-volatile storage device, comprising:

a plurality of non-volatile storage elements, the plurality of non-volatile storage elements includes multiple subsets of non-volatile storage elements, the multiple subsets of non-volatile storage elements include a first subset of non-volatile storage elements;

control lines in communication with the non-volatile storage elements;

local data lines, each subset of non-volatile storage elements includes its own set of local data lines;

a set of global data lines for the multiple subsets of non-volatile storage elements;

first selection circuits, the first selection circuits selectively connect a subset of the local data lines to the global data lines;

second selection circuits that selectively connecting a subset of the control lines to the first local data lines; and

control circuits in communication with the global data lines, each selection circuit of the first set of selection circuits is in communication with a different group of two or more of the local data lines and one global data line so that during memory operations each selection circuit of the first set of selection circuits selectively connects a respective first non-volatile storage element to the control circuits until a memory operation completes for the respective first non-volatile storage element and then selectively connects a respective second non-volatile storage element to the control circuits independent of other selection circuits of the first set of selection circuits in order to perform a memory operation for the second non-volatile storage element.

14. The non-volatile storage device of claim 13, wherein:

the first set of selections circuits include multiplexer circuits each of which is connected to two or more local data lines and one global data line.

15. The non-volatile storage device of claim 13, wherein:

the control lines are positioned within the plurality of non-volatile storage elements;

the local data lines are outside the plurality of non-volatile storage element; and

the global data lines are positioned outside of the plurality of non-volatile storage elements.

16. The data storage system of claim 15, wherein:

the local data lines are positioned in at least one metal layer below the plurality of non-volatile storage elements; and

the global data lines are positioned in at least one metal layer above the plurality of non-volatile storage elements.

17. The data storage system of claim 13, wherein:

the control circuitry is positioned on a surface of a substrate;

the plurality of non-volatile storage elements comprise a monolithic three-dimensional memory array positioned above the surface of the substrate and above the control circuitry;

the local data lines are positioned between the monolithic three-dimensional memory array and the surface of the substrate; and

the global data lines are positioned above the monolithic three-dimensional memory array and the surface of the substrate.

18. A method for operating a data storage system, comprising:

concurrently performing a memory operation on a first non-volatile storage element of each group of a plurality of groups of non-volatile storage elements;

independently detecting completion of the memory operation for the first non-volatile storage element of each group; and

independently commencing a memory operation on a second non-volatile storage element of each group upon independently detecting completion of the memory operation for the first non-volatile storage element of each group.

19. The method of claim 18, wherein:

the concurrently performing the memory operation on the first non-volatile storage element of each group comprises selectively connecting the first non-volatile storage element of each group to control circuitry and performing a memory operation on the connected first non-volatile storage element of each group using the control circuitry;

the independently detecting completion of the memory operation for the first non-volatile storage element of each group is performed using the control circuitry; and

the independently commencing a memory operation on the second non-volatile storage element of each group comprises disconnecting the first non-volatile storage element for each group from the control circuitry, connecting the second non-volatile storage element for each group to the control circuitry and performing the memory operation on the connected second non-volatile storage element of each group using the control circuitry, all commenced independently for each group after independently detecting completion of the memory operation for the connected first non-volatile storage element of each group.

20. The method of claim 18, wherein:

the plurality of groups of non-volatile storage elements includes sixteen groups of non-volatile storage elements;

each of the groups of non-volatile storage elements includes two reversible resistance-switching non-volatile storage elements;

the concurrently performing the memory operation on the first non-volatile storage element of each group comprises changing a resistance of up to sixteen reversible resistance-switching non-volatile storage elements;

the independently detecting completion of the memory operation for the first non-volatile storage element of each group includes detecting change in resistance of the up to sixteen reversible resistance-switching non-volatile storage elements at different times; and

the independently commencing a memory operation on the second non-volatile storage element of each group comprises commencing an operation to change resistance of up to sixteen different reversible resistance-switching non-volatile storage elements at different times.

21. The method of claim 18, wherein the non-volatile storage elements are reversible resistance-switching non-volatile storage elements and the concurrently performing the memory operation comprises:

applying a charge to a control line connected to a reversible resistance-switching non-volatile storage element for a first period of time that is insufficient to change the reversible resistance-switching non-volatile storage element from a first predetermined resistance state to a second predetermined resistance state; and

after the first period of time, allowing the control line to discharge the applied charge through the reversible resistance-switching non-volatile storage element in order to change the reversible resistance-switching non-volatile storage element from the first predetermined resistance state to the second predetermined resistance state, the detecting completion of the memory operation includes detecting the change from the first predetermined resistance state to the second predetermined resistance state.

22. The method of claim 18, wherein:

the concurrently performing the memory operation includes concurrently changing resistance of multiple reversible resistance-switching non-volatile storage elements in a monolithic three-dimensional memory array.

23. A method for operating a data storage system, comprising:

selectively connecting a set of control lines to a set of local data lines so that each local data line of the set of local data lines is connected to one control line of the set of control lines, each control line is in communication with a different non-volatile data storage element so that each data line of the set of local data lines is in communication with a respective non-volatile storage element, the set of local data lines includes a first subset of the local data lines and a second subset of the local data lines;

selectively connecting the first subset of the local data lines to a set of global data lines, the global data lines are connected to control circuitry;

performing a first memory operation on non-volatile storage elements in communication with the first subset of local data lines, the memory operation is performed using the control circuitry;

separately detecting when each non-volatile storage elements in communication with the first subset of local data lines has completed the memory operation;

for each global data line of the set of global data lines, independently disconnecting a respective local data line of the first subset of local data lines and independently connecting a local data line from the second subset of local data lines in response to detecting completion of the memory operation for the respective non-volatile storage element in communication with the respective local data line of the first subset of local data lines; and

performing a second memory operation on non-volatile storage elements in communication with the second subset of local data lines, the second memory operation is started independently for non-volatile storage elements in communication with the second subset of local data lines in response to selectively connecting respective local data lines from the second subset of local data lines to the global data lines.

24. The method of claim 23, wherein:

the selectively connecting the first subset of the local data lines to a set of global data lines is performed by multiplexer circuits.

25. The method of claim 23, wherein:

the independently disconnecting the respective local data line of the first subset of local data lines is performed at different times for different local data lines; and

the independently connecting the local data line from the second subset of local data lines is performed at different times for different local data lines.