METHOD AND SYSTEM FOR REDUCTION OF DECODING COMPLEXITY IN A COMMUNICATION SYSTEM

• US 20100272124A1
• Filed: 06/18/2010
• Published: 10/28/2010
• Est. Priority Date: 10/12/2001
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Rezaiifar, Ramin, Agashe, Parag A., Wei, Yongbin, Chen, Tao, Bender, Paul E., Pankaj, Rajesh K.
• Granted Patent: US 8,730,999 B2
• Time in Patent Office: Days
• US Class Current: 370/474
• CPC Class Codes: H03M 13/2909 Product codes
• CPC Class Codes: H03M 13/293 with erasure setting
• CPC Class Codes: H03M 13/2936 comprising an outer Reed-Solomon code and an inner convolutional code
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0066 Parallel concatenated codes

Abstract

Method and System for Utilization of an Outer Decoder in a Broadcast Services Communication System is described. Information to be transmitted is provided to a systematic portion of a plurality of transmit buffers and encoded by an outer decoder communicatively coupled to the transmit buffer. The resulting redundant bits are provided to a parity portion of each transmit buffer. The content of the transmit buffers, is multiplexed and encoded by an inner decoder to improve protection by adding redundancy. The receiving station recovers the transmitted information by an inverse process. Because a decoding complexity depends on the size of a systematic portion of the transmit buffer, reasoned compromise between a systematic portion size and number of transmit buffers yields decreased decoding complexity.

Claims

1. An encoding method for reducing decoding complexity, the method comprising:

encoding systematic bits stored in each of a plurality of buffers with a first code to generate parity bits;

multiplexing content in the plurality of buffers; and

encoding said multiplexed content with a second code to provide a set of frames,

wherein each of the plurality of buffers comprises a systematic buffer for storing the systematic bits before the encoding systematic bits, as uncoded data, and a parity buffer in for storing the parity bits, such that said multiplexing is performed directly on the content in said plurality of buffers.

2. The method as claimed in claim 1 wherein said encoding systematic bits in each of a plurality of buffers with an first code comprises:

encoding systematic bits in each of the plurality of buffers with a block code.

3. The method as claimed in claim 2 wherein said encoding systematic bits in each of a plurality of buffers with a block code comprises:

encoding systematic bits in each of the plurality of buffers with a Reed-Solomon code.

4. The method as claimed in claim 1 wherein said multiplexing content of the plurality of buffers comprises:

providing a block of bits successively from each of the plurality of buffers.

5. The method claimed in claim 4 wherein said providing a block of bits successively from each of the plurality of buffers comprises:

providing a block of bits comprising a row of each of the plurality of buffers.

6. The method claimed in claim 1 wherein said encoding said multiplexed content with an second code to provide a set of frames comprises:

identifying a block of bits to be encoded; and

encoding the block of bits with a second code.

7. The method claimed in claim 6 wherein said identifying a block of bits to be encoded comprises:

identifying a block of bits received from a buffer.

8. A method for reducing decoding complexity, comprising:

encoding systematic bits stored in each of a plurality of transmit buffers with an first code to generate parity bits;

multiplexing content in the plurality of transmit buffers;

encoding said multiplexed content with a second code to provide a set of frames;

transmitting the set of frames;

decoding received frames by a second decoder;

de-multiplexing correctly decoded frames to a plurality of receive buffers; and

processing content of each of the plurality of receive buffer, said content of each receive buffer including systematic portion and parity portion,

wherein each of the plurality of transmit buffers comprises a systematic buffer for storing the systematic bits before the encoding systematic bits, as uncoded data, and a parity buffer in for storing the parity bits, such that said multiplexing is performed directly on the content in said plurality of transmit buffers.

9. The method as claimed in claim 8 wherein said encoding systematic bits in each of a plurality of transmit buffers with an first code comprises:

encoding systematic bits in each of a plurality of buffers with a block code.

10. The method as claimed in claim 9 wherein said encoding systematic bits in each of a plurality of buffers with a block code comprises:

encoding systematic bits in each of a plurality of buffers with a Reed-Solomon code.

11. The method as claimed in claim 8 wherein said multiplexing content of the plurality of transmit buffers comprises:

providing a block of bits successively from each buffer.

12. The method claimed in claim 11 wherein said providing a block of bits successively from each buffer comprises:

providing a block of bits comprising a row of the transmitting buffer.

13. The method claimed in claim 8 wherein said encoding said multiplexed content with an second code to provide a set of frames comprises:

identifying a block of bits to be encoded; and

encoding the block of bits with an second code.

14. The method claimed in claim 13 wherein said identifying a block of bits to be encoded comprises:

identifying the block of bits as a block of bits received from a buffer.

15. The method as claimed in claim 8 wherein said de-multiplexing correctly decoded frame to a plurality of receive buffers comprises:

identifying a block of bits belonging to a buffer; and

providing the block of bits to the buffer.

16. The method as claimed in claim 15 wherein said identifying a block of bits belonging to a buffer comprises:

identifying a block of bits as a block of bits comprising a frame decoded by the second decoder.

17. The method as claimed in claim 8 wherein said processing content of each receive buffer comprises:

providing the systematic portion of each receive buffer to layers higher than a physical layer.

18. The method as claimed in claim 8 further comprising:

providing indication of an erasure to an first decoder communicatively coupled to the receive buffer that would receive the correctly decoded frame if the frame failed to decode correctly.

19. The method as claimed in claim 18 wherein said processing content of each receive buffer comprises:

decoding the systematic portion of the receive buffer by an first decoder when the systematic portion is recoverable; and

providing the decoded systematic portion of the receive buffer to layers higher than a physical layer.

20. An encoding apparatus for reducing decoding complexity, comprising:

a plurality of buffers;

a plurality of encoders, each of said plurality of encoders being communicatively coupled to one of said plurality of buffers for encoding systematic bits stored in the respective buffer to generate parity bits;

a multiplexer communicatively coupled to said plurality of buffers for multiplexing content in the plurality of buffers; and

an inner encoder communicatively coupled to said multiplexer for encoding said multiplexed content,

wherein each of the plurality of buffers comprises a systematic buffer for storing the systematic bits before the encoding systematic bits, as uncoded data, and a parity buffer in for storing the parity bits, such that said multiplexing is performed directly on the content in said plurality of buffers.

21. The apparatus as claimed in claim 20 wherein each of said plurality of buffers is configured to:

store systematic bits and parity bits.

22. The apparatus as claimed in claim 20 wherein each of said plurality of encoders is configured to:

encode systematic bits to provide parity bits.

23. The apparatus as claimed in claim 22 wherein each of said plurality of encoders is configured to:

encode the systematic bits with a block code.

24. The apparatus as claimed in claim 20 wherein each of said plurality of encoders is configured to:

encode the systematic bits with a Reed-Solomon code.

25. The apparatus claimed in claim 20 wherein said multiplexer is configured to:

provide a block of bits successively from each of said plurality of buffers to said inner encoder.

26. The apparatus as claimed in claim 25 wherein said block of bits comprises a row of said buffer.

27. The apparatus as claimed in claim 20 wherein said inner encoder is configured to:

identify a block of bits to be encoded; and

encode the block of bits with an inner code.

28. The apparatus as claimed in claim 27 wherein said block of bits to be encoded comprises:

a block of bits received from said multiplexer.

29. An apparatus for reducing decoding complexity, comprising:

a plurality of transmit buffers;

a plurality of encoders, each of said plurality of encoders being communicatively coupled to one of said plurality of transmit buffers for encoding systematic bits stored in the respective transmit buffer to generate parity bits;

a multiplexer communicatively coupled to said plurality of transmit buffers for multiplexing content in the plurality of transmit buffers;

an inner encoder communicatively coupled to said multiplexer for encoding said multiplexed content;

a first decoder;

a de-multiplexer communicatively coupled to said first decoder;

a plurality of receive buffers communicatively coupled to said demultiplexer, wherein content of each receive buffer includes systematic portion and parity portion; and

a plurality of decoders, each of said plurality of decoders being communicatively coupled to one of said plurality of receive buffers,

wherein each of the plurality of transmit buffers comprises a systematic buffer for storing the systematic bits before the encoding systematic bits, as uncoded data, and a parity buffer in for storing the parity bits, such that said multiplexing is performed directly on the content in said plurality of transmit buffers.

30. The apparatus as claimed in claim 29 wherein each of said plurality of transmit buffers is configured to:

store systematic bits and parity bits.

31. The apparatus as claimed in claim 29 wherein each of said plurality of encoders is configured to:

encode systematic bits to provide parity bits.

32. The apparatus as claimed in claim 31 wherein each of said plurality of encoders is configured to:

encode the systematic bits with a block code.

33. The apparatus as claimed in claim 29 wherein each of said plurality of encoders is configured to:

encode the systematic bits with a Reed-Solomon code.

34. The apparatus claimed in claim 29 wherein said multiplexer is configured to:

provide a block of bits successively from each of said plurality of transmit buffers to said inner encoder.

35. The apparatus as claimed in claim 34 wherein said block of bits comprises a row of said transmit buffer.

36. The apparatus as claimed in claim 29 wherein said inner encoder is configured to:

identify a block of bits to be encoded; and

encode the block of bits with an inner code.

37. The apparatus as claimed in claim 36 wherein the block of bits to be encoded comprises:

a block of bits received from said multiplexer.

38. The method as claimed in claim 29 wherein said first decoder is configured to:

decode a received frame;

provide a correctly decoded frame; and

provide indication of an erasure if the received frame failed to decode correctly.

39. The apparatus as claimed in claim 29 wherein said de-multiplexer is configured to:

identify a block of bits belonging to a receive buffer; and

provide the block of bits to the receive buffer.

40. The apparatus as claimed in claim 39 wherein said block of bits belonging to a receiver buffer comprises:

a block of bits comprising a frame decoded by said first decoder.

41. The method as claimed in claim 29 wherein each of said plurality of decoders is configured to:

decode the systematic portion of the receive buffer by an outer decoder when the systematic portion is recoverable and

providing the decoded systematic portion of the receive buffer to layers higher than a physical layer.

42. A memory encoded with codes for executing instruction to cause a processor to perform:

encoding systematic bits stored in each of a plurality of buffers with a first code to generate parity bits;

multiplexing content in the plurality of buffers; and

encoding said multiplexed content with a second code to provide a set of frames,

wherein each of the plurality of buffers comprises a systematic buffer for storing the systematic bits before the encoding systematic bits, as uncoded data, and a parity buffer in for storing the parity bits, such that said multiplexing is performed directly on the content in said plurality of buffers.

43. A memory encoded with codes for executing instruction to cause a processor to perform:

encoding systematic bits stored in each of a plurality of transmit buffers with an first code to generate parity bits;

multiplexing content in the plurality of transmit buffers;

encoding said multiplexed content with a second code to provide a set of frames;

transmitting the set of frames;

decoding received frames by a second decoder;

de-multiplexing correctly decoded frames to a plurality of receive buffers; and

processing content of each of the plurality of receive buffer, said content of each receive buffer including systematic portion and parity portion,

wherein each of the plurality of transmit buffers comprises a systematic buffer for storing the systematic bits before the encoding systematic bits, as uncoded data, and a parity buffer in for storing the parity bits, such that said multiplexing is performed directly on the content in said plurality of transmit buffers.