×

Random Delay Generation for Thin-Film Transistor Based Circuits

  • US 20100295661A1
  • Filed: 11/24/2009
  • Published: 11/25/2010
  • Est. Priority Date: 11/26/2008
  • Status: Active Grant
First Claim
Patent Images

1. A circuit configured to generate a delay comprising:

  • a) a delay element having an input terminal and an output terminal;

    b) a capacitor having a first terminal receiving an input and a second terminal coupled to said input of said delay element; and

    c) a thin-film field-effect transistor (TFT) having a first and second source/drain terminals and a gate, configured to provide a current and/or voltage to said capacitor,wherein said current and/or voltage has a value that falls randomly within a predetermined range.

View all claims
  • 5 Assignments
Timeline View
Assignment View
    ×
    ×