POWER ISLAND WITH INDEPENDENT POWER CHARACTERISTICS FOR MEMORY AND LOGIC

• US 20100308897A1
• Filed: 06/05/2009
• Published: 12/09/2010
• Est. Priority Date: 06/05/2009
• Status: Active Grant

• Current Assignee: VLSI Technology LLC (SoftBank Group Corp.)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: EVOY, DAVID R., KLAPPORTH, PETER, PINEDA DE GYVEZ, JOSE J.
• Granted Patent: US 8,004,922 B2
• Time in Patent Office: Days
• US Class Current: 327/530
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A power island for a system-on-a-chip (SoC) includes a first segment, a second segment, and a supply line. The first segment includes a hardware device and operates the hardware device at first power characteristics indicative of at least a first voltage. The second segment includes scalable logic and operates the scalable logic at second power characteristics indicative of at least a second voltage. The second power characteristics of the scalable logic are different from the first power characteristics of the hardware device. The supply line receives an external supply signal (VDD) and directs the external supply signal to both the first segment and the second segment. The second segment changes at least one power characteristic of the external supply signal to operate the scalable logic according to the second power characteristics.

Claims

1. A power island for a system-on-a-chip (SoC), the power island comprising:

a first segment comprising a hardware device, the first segment to operate the hardware device at first power characteristics indicative of at least a first voltage;

a second segment comprising scalable logic, the second segment to operate the scalable logic at second power characteristics indicative of at least a second voltage, wherein the second power characteristics of the scalable logic are different from the first power characteristics of the hardware device; and

a supply line to receive an external supply signal (VDD) and to direct the external supply signal to both the first segment and the second segment, wherein the second segment is configured to change at least one power characteristic of the external supply signal to operate the scalable logic according to the second power characteristics.

2. The power island of claim 1, wherein the first power characteristics of the hardware device are variable to operate the hardware device over a first range of power characteristics, and the second power characteristics of the scalable logic are separately variable, independent of the first power characteristics, to operate the scalable logic over a second range of power characteristics.

3. The power island of claim 2, wherein the first power characteristics of the hardware device are externally controlled from outside the power island, and the second power characteristics of the scalable logic are internally controlled from inside the power island.

4. The power island of claim 1, wherein the second segment comprises a supply power converter coupled between the supply line of the power island and the scalable logic, wherein the supply power converter is configured to convert a supply voltage of the external supply signal from the first power characteristics to the second power characteristics.

5. The power island of claim 4, further comprising a reference line to receive a reference signal (VSS), wherein the second segment further comprises a reference power converter coupled between the reference line of the power island and the scalable logic, wherein the reference power converter is configured to convert a reference voltage of the reference signal from the first power characteristics to the second power characteristics.

6. The power island of claim 5, wherein:

the supply power converter comprises a VDD switch with a first added resistance to cause a first voltage drop and reduce the supply voltage of the external supply signal to the second voltage of the second power characteristics; and

the reference power converter comprises a VSS switch with a second added resistance to cause a second voltage drop and change the reference voltage consistent with the second power characteristics.

7. The power island of claim 6, further comprising a switch controller coupled to the VDD switch and the VSS switch, wherein the switch controller is configured to control the VDD switch and the VSS switch to change the external supply signal and the reference signal according to the second power characteristics of the scalable logic.

8. The power island of claim 1, wherein the hardware device comprises a memory device.

9. The power island of claim 8, wherein the memory device comprises a static random access memory (SRAM) device.

10. The power island of claim 1, wherein a switching threshold of the first or second segment with the lower supply voltage is at a same switching threshold voltage as the other segment.

11. The power island of claim 10, wherein the switching threshold of the first or second segment with the lower supply voltage is at the same switching threshold voltage as the other segment as a result of simultaneously lowering a power supply and raising a ground potential.

13. The SoC of claim 10, wherein each power island further comprises a single supply line to receive the unique supply signal from the corresponding power control, wherein the supply line is coupled to both the first and second segments to direct the unique supply signal to both the first and second segments.

14. The SoC of claim 11, wherein the second segment is configured to change at least one power characteristic of the unique supply signal from the corresponding power control to operate the second device according to the second power characteristics.

16. The SoC of claim 13, wherein the second segment further comprises:

a VDD switch coupled between the supply line and the scalable logic, wherein VDD switch comprises a first added resistance to cause a first voltage drop and reduce the first voltage of the first power characteristics to the second voltage of the second power characteristics; and

a VSS switch coupled between a reference voltage (VDD) and the scalable logic, wherein the VSS switch comprises a second added resistance to cause a second voltage drop and change the reference voltage consistent with the second power characteristics.

17. The SoC of claim 14, further comprising a switch controller coupled to the VDD switch and the VSS switch, wherein the switch controller is configured to control the VDD switch and the VSS switch to change the unique supply signal and the reference signal according to the second power characteristics of the scalable logic.

12. A system-on-a-chip (SoC) comprising:

a plurality of power controls, wherein each power control is configured to supply a unique supply signal (VDD) having a supply voltage; and

a plurality of power islands coupled to the plurality of power controls, wherein each power island is coupled to a corresponding power control to receive a single unique supply signal from the corresponding power control, wherein each power island comprises;

a first segment comprising a first module which operates at first power characteristics, wherein the first power characteristics include the supply voltage of the unique supply signal from the corresponding power control; and

a second segment comprising a second module which operates at second power characteristics that are at least partially different from the first power characteristics of the first segment.

15. The SoC of claim 12, wherein:

the first module comprises a memory device to operate according to the first power characteristics; and

the second module comprises scalable logic to operate according to the second power characteristics, wherein a second voltage of the second power characteristics is lower than a first voltage of the first power characteristics.

18. The SoC of claim 15, further comprising a power controller coupled to the plurality of power controls, wherein the power controller is configured to control when each power control supplies the corresponding unique supply signal to the corresponding power island, wherein:

the power controller is further configured to vary the first power characteristics of the first segment from outside the power island; and

the switch controller is further configured to vary the second power characteristics of the second segment from inside the power island.

20. The method of claim 18, further comprising:

coupling the logic module to the supply power converter, wherein the logic module is configured to operate at the second power characteristics;

coupling a reference power converter to the logic module, wherein the reference power converter is configured to change at least one power characteristic of a reference signal (VSS) to generate an internal reference signal (VSSi) according to the second power characteristics; and

coupling a conversion controller to the supply power converter and to the reference power converter, wherein the conversion controller is configured to control the supply power converter and the reference power converter to generate the internal supply signal (VDDi) and the internal reference signal (VSSi) according to the second power characteristics.

19. A method for making a power island for a system-on-a-chip (SoC), the method comprising:

coupling a memory device to a supply line of the power island, wherein the supply line is configured to receive an external supply signal (VDD) from an external power control to operate the memory device according to first power characteristics; and

coupling a supply power converter to the supply line of the power island, wherein the supply power converter is configured to change at least one power characteristic of the external supply signal to supply an internal supply signal (VDDi) to a logic module on the power island according to second power characteristics that are at least partially different from the first power characteristics.