MASKING METHOD

• US 20100317192A1
• Filed: 06/15/2010
• Published: 12/16/2010
• Est. Priority Date: 06/16/2009
• Status: Active Grant

• Current Assignee: SolarWorld Industries GmbH
• Original Assignee: Solarworld Innovations GmbH (Solarworld AG)
• Inventors: Schlosser, Reinhold, Bamberg, Frederick, NEUHAUS, Holger, Bitnar, Bernd, Krause, Andreas
• Granted Patent: US 8,551,883 B2
• Time in Patent Office: Days
• US Class Current: 438/674
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 31/068 the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product
• CPC Class Codes: Y10T 428/24802 Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]

Abstract

The invention relates to a method for masking a semiconductor substrate comprising the following steps: providing a planar semiconductor substrate having a first side and a second side lying opposite thereto, applying a mask to at least one of the sides, an extrusion printing method being envisaged for applying the mask.

Claims

1. A method for masking a semiconductor substrate (1) comprising the following steps:

a. providing a planar semiconductor substrate (1) having

i. a first side (2) and

ii. a second side (3) lying opposite thereto,

b. applying a mask (4) to at least one of the sides (2, 3),

c. an extrusion printing method being envisaged for applying the mask (4).

2. A method according to claim 1, wherein the mask (4) exhibits during the application a viscosity of at least 1 Pa·

s.

3. A method according to claim 1, wherein the mask (4) exhibits during the application a viscosity of at least 10 Pa·

s.

4. A method according to claim 1, wherein the mask (4) exhibits during the application a viscosity of at least 30 Pa·

s.

5. A method according to claim 1, wherein the mask (4) exhibits at least two adjacent areas with different mask materials (11, 12).

6. A method according to claim 5, wherein the different mask materials (11, 12) exhibit an at best negligible mixability.

7. A method according to claim 5, wherein the different mask materials (11, 12) are applied at the same time, to the semiconductor substrate (1).

8. A method according to claim 5, wherein the different mask materials (11, 12) are applied to the semiconductor substrate (1) at the same time by means of a co-extrusion printing method.

9. A method according to claim 1, wherein for applying the mask (4) a pressure device (5) with a pressure head (6;

6a) is envisaged.

10. A method according to claim 1, wherein at least two mask materials (11, 12) are guided through different channels (17) in a common nozzle (7) in the pressure head (6a).

11. A method according to claim 5, wherein as the first mask material there is envisaged an organic masking material (12).

12. A method according to claim 5, wherein as the first mask material there is envisaged one of the group of a resin or a wax.

13. A method according to claim 11, wherein after the application of the mask (4) the semiconductor substrate (1) is heated, the masking material (11) solidifying during heating to a process temperature (T_P).

14. A method according to claim 5, wherein as the second mask material there is envisaged a sacrificial material (12) and the semiconductor substrate (1) is heated after the application of the mask (4), the sacrificial material (12) evaporating during heating to a process temperature (T_P).

15. A method according to claim 5, wherein as the second mask material (12) there is envisaged an etching paste for etching a layer on the semiconductor substrate.

16. A method according to claim 5, wherein after the application of the mask (4), a doping step is envisaged, the first mask material (11) at least partly absorbing a dopant beam.

17. A method according to claim 5 wherein after the application of the mask (4) an ion implantation step is envisaged, the first mask materials (11) at least partly absorbing a dopant beam.

18. A use of the method according to claim 1 for manufacturing a doping mask.

19. A method for manufacturing a contact structure for a semiconductor component comprising the following steps:

a. masking at least one side (2, 3) of a semiconductor substrate (1) according to one of the preceding claims,

b. applying, at least in areas, an electrically conductive metallisation to the at least one masked side (2, 3).

20. An intermediate product during the manufacture of a semiconductor component, comprising

a. a semiconductor substrate (1) of a planar design having

i. a first side (2) and

ii. a second side (3) lying opposite thereto,

b. a mask (4) on at least one of the sides (2, 3),

c. the mask (4) exhibiting at least two adjacent areas (9, 10) with different mask materials (11, 12).

21. An intermediate product according to claim 20, wherein the different mask materials (11, 12) are selected such that at least one is solidifyable by heating to a process temperature (T_P), while at least one other is evaporable during this.