ARRANGEMENT FOR IDENTIFYING UNCONTROLLED EVENTS AT THE PROCESS MODULE LEVEL AND METHODS THEREOF

• US 20100332012A1
• Filed: 09/08/2009
• Published: 12/30/2010
• Est. Priority Date: 06/30/2009
• Status: Active Grant

• Current Assignee: Lam Research Corporation
• Original Assignee: Lam Research Corporation
• Inventors: Lam, Connie, Venugopal, Vijayakumar C., Huang, Chung-Ho, Podlesnik, Dragan
• Granted Patent: US 8,983,631 B2
• Time in Patent Office: Days
• US Class Current: 700/110
• CPC Class Codes: G05B 19/4184 characterised by fault tolerance, reliability of production system
• CPC Class Codes: G05B 2219/31202 Semiconductor equipment communication standard SECS
• CPC Class Codes: G05B 2219/31293 Enter size measurements, store in data base, analyze and identify in size data group
• CPC Class Codes: G05B 2219/31318 Data analysis, using different formats like table, chart
• CPC Class Codes: G05B 2219/31481 Safety monitoring system, redundant display, print systems for process data
• CPC Class Codes: G05B 2219/32209 Stop production line
• CPC Class Codes: G05B 2219/45031 Manufacturing semiconductor wafers
• CPC Class Codes: G06F 11/2035 without idle spare hardware
• CPC Class Codes: G06F 11/2043 where the redundant components share a common memory address space
• CPC Class Codes: G06F 9/5027 the resource being a machine, e.g. CPUs, Servers, Terminals
• CPC Class Codes: Y02P 90/02 Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

A process-level troubleshooting architecture (PLTA) configured to facilitate substrate processing in a plasma processing system is provided. The architecture includes a process module controller. The architecture also includes a plurality of sensors, wherein each sensor of the plurality of sensors communicates with the process module controller to collect sensed data about one or more process parameters. The architecture further includes a process-module-level analysis server, wherein the process-module-level analysis server communicates directly with the plurality of sensors and the process module controller. The process-module-level analysis server is configured for receiving data, wherein the data include at least one of the sensed data from the plurality of sensors and process module and chamber data from the process module controller. The process-module-level analysis server is also configured for analyzing the data and sending interdiction data directly to the process module controller when a problem is identified during the substrate processing.

Claims

1. A process-level troubleshooting architecture (PLTA) configured to facilitate substrate processing in a plasma processing system, comprising:

a process module controller;

a plurality of sensors, wherein each sensor of said plurality of sensors communicates with said process module controller to collect sensed data about one or more process parameters; and

a process-module-level analysis server, wherein said process-module-level analysis server communicates directly with said plurality of sensors and said process module controller, wherein said process-module-level analysis server is configured for

receiving data, wherein said data include at least one of said sensed data from said plurality of sensors and process module and chamber data from said process module controller,

analyzing said data, and

sending interdiction data directly to said process module controller when a problem is identified during said substrate processing.

2. The process-level troubleshooting architecture of claim 1 wherein a first sensor of said plurality of sensors includes a computing module for performing preprocessing before sending at least a portion of said sensed data to said process-module-level analysis server.

3. The process-level troubleshooting architecture of claim 2 wherein said process-module-level analysis server includes an Ethernet switch, wherein said Ethernet switch enables said process-module-level analysis server to communicate with said first sensor.

4. The process-level troubleshooting architecture of claim 1 wherein a first sensor of said plurality of sensors sends at least a portion of said sensed data directly from said first sensor to said process-module-level analysis server without preprocessing.

5. The process-level troubleshooting architecture of claim 4 wherein said process-module-level analysis server includes a data converter for converting from an analog format into a digital format said sensed data sent by said first sensor.

6. The process-level troubleshooting architecture of claim 1 wherein said process-module-level analysis server includes a shared memory backbone, wherein said shared memory backbone is accessed by a plurality of processors, wherein each processor of said plurality of processors is configured at least for interacting with one sensor of said plurality of sensors through said shared memory backbone.

7. The process-level troubleshooting architecture of claim 6 wherein said shared memory backbone is configured to perform load balancing among said plurality of processors.

8. The process-level troubleshooting architecture of claim 7 wherein said shared memory backbone is configured to provide fault tolerance among said plurality of processors.

9. The process-level troubleshooting architecture of claim 6 wherein at least one processor of said plurality of processors is a secondary processor, wherein said secondary processor is configured at least for receiving said sensed data from at least one sensor of said plurality of sensors and for processing said sensed data.

10. The process-level troubleshooting architecture of claim 9 wherein at least one processor of said plurality of processors is a primary processor, wherein said primary processor is configured at least for performing one of

receiving said process module and chamber data from said process module controller,

receiving said sensed data from at least one sensor of said plurality of sensors,

correlating said process module and chamber data with said sensed data, and

sending substantially real-time interdiction data to said process module controller via a direct digital output line.

11. An arrangement configured to perform evaluation during substrate processing in a plasma processing system, wherein said arrangement is coupled directly to a process module controller and a plurality of sensors, comprising:

a plurality of processors for processing data, wherein said data includes at least one of sensed data collected by said plurality of sensors and process module and chamber data collected by said process module controller, wherein said processing includes at least one of

receiving said data,

analyzing said data,

performing data correlation, and

sending interdiction data to said process module controller when a problem is identified;

a shared memory backbone, wherein said shared memory backbone is accessed by said plurality of processors;

a network interface, wherein said network interface is configured at least for receiving said data; and

a direct digital output line, wherein said direct digital output line is a communication path between said plurality of processors and said process module controller.

12. The arrangement of claim 11 wherein said network interface is configured for receiving said sensed data from at least a first subset of sensors of said plurality of sensors, wherein each sensor of said first subset of sensors includes a computing module for performing preprocessing before sending at least a portion of said sensed data to said plurality of processors via said network interface.

13. The arrangement of claim 12 wherein said network interface is an Ethernet switch.

14. The arrangement of claim 11 further including a data converter for converting said sensed data sent by said plurality of sensors, wherein said data converter is configured at least for converting said sensed data from an analog format into a digital format before sending at least a portion of said sensed data to said plurality of processors.

15. The arrangement of claim 14 wherein said data converter is field-programmable gate array (FPGA).

16. The arrangement of claim 11 wherein said shared memory backbone is configured to perform load balancing among said plurality of processors.

17. The arrangement of claim 11 wherein said shared memory backbone is configured to provide fault tolerance among said plurality of processors

18. The arrangement of claim 11 wherein each processor of said plurality of processors is configured for communicating directly with at least one sensor of said plurality of sensors.

19. The arrangement of claim 18 wherein at least one processor of said plurality of processors is a secondary processor, wherein said secondary processor is configured at least for receiving sensed data from at least one sensor of said plurality of sensors and to process said sensed data.

20. The arrangement of claim 19 wherein at least one processor of said plurality of processors is a primary processor, wherein said primary processor is configured at least for performing one of

receiving said process module and chamber data from said process module controller,

receiving said sensed data from at least one sensor of said plurality of sensors,

correlating said sensed data and said process module and chamber data, and

sending said interdiction data to said process module controller via a direct digital output line.