SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20110017995A1
• Filed: 07/20/2010
• Published: 01/27/2011
• Est. Priority Date: 07/23/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KAWAMATA, Ikuko, KUWABARA, Hideaki, MIYAKE, Hiroyuki, YAMAZAKI, Shunpei, SAKATA, Junichiro
• Granted Patent: US 8,648,343 B2
• Time in Patent Office: Days
• US Class Current: 257/59
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52

Abstract

An object is to increase the aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using a metal and a channel layer is formed using an oxide semiconductor, and a driver circuit wiring formed using a metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode and a drain electrode are formed using an oxide conductor and a semiconductor layer is formed using an oxide semiconductor, and a display portion wiring formed using an oxide conductor. The thin film transistors provided in the semiconductor device are formed with a resist mask formed using a multi-tone mask.

Claims

1. A semiconductor device comprising:

a pixel portion over a substrate, the pixel portion comprising a first transistor; and

a driver circuit over the substrate, the driver circuit comprising a second transistor,

wherein the first transistor comprises;

a first gate electrode layer over the substrate;

a gate insulating layer over the first gate electrode layer;

a first oxide semiconductor layer over the gate insulating layer;

a first oxide insulating layer in contact with the part of the first oxide semiconductor layer;

a first source electrode layer and a first drain electrode layer over the first oxide insulating layer and the first oxide semiconductor layer; and

a pixel electrode layer over the first oxide insulating layer,

wherein the second transistor comprises;

a second gate electrode layer over the substrate;

the gate insulating layer over the second gate electrode layer;

a second oxide semiconductor layer over the gate insulating layer;

a second source electrode layer and a second drain electrode layer over and the second oxide semiconductor layer; and

a second oxide insulating layer over the second source electrode layer and the second drain electrode layer,

wherein the first gate electrode layer, the gate insulating layer, the first oxide semiconductor layer, the first oxide insulating layer, the first source electrode layer, the first drain electrode layer and the pixel electrode layer have a light-transmitting property, and

wherein a material of the second source electrode layer and the second drain electrode layer is different from a material of the first source electrode layer and the first drain electrode layer.

2. The semiconductor device according to claim 1, wherein the second source electrode layer and the second drain electrode layer are in contact with the second oxide semiconductor layer.

3. The semiconductor device according to claim 1,

wherein an end portion of the second oxide semiconductor layer is positioned outer than a side surface of the second source electrode layer and the second drain electrode layer, and

wherein the end portion of the first oxide semiconductor layer is thinner than a region of the first oxide semiconductor layer overlapping with the second source electrode layer and the second drain electrode layer.

4. The semiconductor device according to claim 1,

wherein the second oxide semiconductor layer has a channel formation region thinner than a region overlapping with the second source electrode layer or the second drain electrode layer, and

wherein a conductive layer is provided over the channel formation region with the second oxide insulating layer therebetween.

5. The semiconductor device according to claim 1, wherein the first oxide insulating layer and the second oxide insulating layer are formed using the same light-transmitting insulating material.

6. The semiconductor device according to claim 1, wherein the second source electrode layer and the second drain electrode layer are formed using a film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W or a stacked film including any of these elements.

7. The semiconductor device according to claim 1, wherein the first source electrode layer, the first drain electrode layer, and the pixel electrode layer are formed using indium oxide, an alloy of indium oxide and tin oxide, an alloy of indium oxide and zinc oxide, or zinc oxide.

8. The semiconductor device according to claim 1, further comprising a capacitor portion over the substrate,

wherein the capacitor portion includes a capacitor wiring and a capacitor electrode overlapping with the capacitor wiring, and

wherein the capacitor wiring and the capacitor electrode have a light-transmitting property.

9. The semiconductor device according to claim 1, further comprising a protective insulating film over the first oxide insulating layer, the first source electrode layer, the first drain electrode layer, and the second oxide insulating layer,

wherein the protective insulating film is provided so as to be in contact with the gate insulating layer.

10. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer comprises a high-resistance drain region over the first source electrode layer or the first drain electrode layer.

11. The semiconductor device according to claim 1, wherein the second gate electrode layer comprises a metal layer.

12. A semiconductor device comprising:

a pixel portion over a substrate, the pixel portion comprising a first transistor; and

a driver circuit over the substrate, the driver circuit comprising a second transistor,

wherein the first transistor comprises;

a first gate electrode layer over the substrate;

a gate insulating layer over the first gate electrode layer;

a first oxide semiconductor layer over the gate insulating layer;

a first oxide insulating layer in contact with the part of the first oxide semiconductor layer;

a first source electrode layer and a first drain electrode layer over the first oxide insulating layer and the first oxide semiconductor layer; and

a pixel electrode layer over the first oxide insulating layer,

wherein the second transistor comprises;

a second gate electrode layer over the substrate;

the gate insulating layer over the second gate electrode layer;

a second oxide semiconductor layer over the gate insulating layer;

a second source electrode layer and a second drain electrode layer over and the second oxide semiconductor layer; and

a second oxide insulating layer over the second source electrode layer and the second drain electrode layer,

wherein the first gate electrode layer, the gate insulating layer, the first oxide semiconductor layer, the first oxide insulating layer, the first source electrode layer, the first drain electrode layer and the pixel electrode layer have a light-transmitting property,

wherein a material of the second source electrode layer and the second drain electrode layer is different from a material of the first source electrode layer and the first drain electrode layer, and

wherein the second oxide semiconductor layer comprises a second high-resistance drain region over the second source electrode layer or the second drain electrode layer.

13. The semiconductor device according to claim 12, wherein the second source electrode layer and the second drain electrode layer are in contact with the second oxide semiconductor layer.

14. The semiconductor device according to claim 12,

wherein an end portion of the second oxide semiconductor layer is positioned outer than a side surface of the second source electrode layer and the second drain electrode layer, and

wherein the end portion of the first oxide semiconductor layer is thinner than a region of the first oxide semiconductor layer overlapping with the second source electrode layer and the second drain electrode layer.

15. The semiconductor device according to claim 12,

wherein the second oxide semiconductor layer has a channel formation region thinner than a region overlapping with the second source electrode layer or the second drain electrode layer, and

wherein a conductive layer is provided over the channel formation region with the second oxide insulating layer therebetween.

16. The semiconductor device according to claim 12, wherein the first oxide insulating layer and the second oxide insulating layer are formed using the same light-transmitting insulating material.

17. The semiconductor device according to claim 12, wherein the second source electrode layer and the second drain electrode layer are formed using a film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W or a stacked film including any of these elements.

18. The semiconductor device according to claim 12, wherein the first source electrode layer, the first drain electrode layer, and the pixel electrode layer are formed using indium oxide, an alloy of indium oxide and tin oxide, an alloy of indium oxide and zinc oxide, or zinc oxide.

19. The semiconductor device according to claim 12, further comprising a capacitor portion over the substrate,

wherein the capacitor portion includes a capacitor wiring and a capacitor electrode overlapping with the capacitor wiring, and

wherein the capacitor wiring and the capacitor electrode have a light-transmitting property.

20. The semiconductor device according to claim 12, further comprising a protective insulating film over the first oxide insulating layer, the first source electrode layer, the first drain electrode layer, and the second oxide insulating layer,

wherein the protective insulating film is provided so as to be in contact with the gate insulating layer.

21. The semiconductor device according to claim 12, wherein the first oxide semiconductor layer comprises a high-resistance drain region over the first source electrode layer or the first drain electrode layer.

22. The semiconductor device according to claim 12, wherein the second gate electrode layer comprises a metal layer.

23. A method for manufacturing a semiconductor device comprising:

forming a first gate electrode layer and a second gate electrode layer over a substrate;

forming a gate insulating layer over the first gate electrode layer and the second gate electrode layer;

forming an oxide semiconductor film over the gate insulating layer;

performing a first heat treatment for dehydration or dehydrogenation on the oxide semiconductor film in a gas selected from a nitrogen gas and an inert gas;

forming a conductive film over the oxide semiconductor film;

patterning the conductive film and the oxide semiconductor film to form a second source electrode layer, a second drain electrode layer, a second oxide semiconductor layer over the second gate electrode layer, and to form a first oxide semiconductor layer over the first gate electrode layer;

forming a first oxide insulating layer over the first gate electrode layer, and a second oxide insulating layer over the second gate electrode layer;

forming a first source electrode layer and a first drain electrode layer over the first oxide semiconductor layer and the first oxide insulating layer; and

forming a pixel electrode layer over the first oxide insulating layer, the pixel electrode electrically connected to one of the first source electrode layer and the first drain electrode layer.

24. The method for manufacturing a semiconductor device according to claim 23, wherein the conductive film is formed so as to be in contact with the second oxide semiconductor layer.

25. The method for manufacturing a semiconductor device according to claim 23,

wherein the first oxide semiconductor layer is formed so that an end portion of the first oxide semiconductor layer is provided outer than a side surface of the second source electrode layer and the second drain electrode layer and thinner than a region of the first oxide semiconductor layer overlapping with the second source electrode layer and the second drain electrode layer.

26. The method for manufacturing a semiconductor device according to claim 23,

wherein the second oxide semiconductor layer has a channel formation region thinner than a region overlapping with the second source electrode layer or the second drain electrode layer, and

wherein a conductive layer is provided over the channel formation region with the second oxide insulating layer therebetween.

27. The method for manufacturing a semiconductor device according to claim 23, wherein the second source electrode layer and the second drain electrode layer are formed using a film comprising an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W or a stacked film including any of these elements.

28. The method for manufacturing a semiconductor device according to claim 23,

wherein the conductive film and the oxide semiconductor film are patterned with a resist mask, and

wherein the resist mask is formed using a light-exposure mask, and a half-tone mask or a gray-tone mask is used as the light-exposure mask.

29. The method for manufacturing a semiconductor device according to claim 23, wherein the first source electrode layer, the first drain electrode layer, and the pixel electrode layer are formed using indium oxide, an alloy of indium oxide and tin oxide, an alloy of indium oxide and zinc oxide, or zinc oxide

30. The method for manufacturing a semiconductor device according to claim 23, further comprising:

forming a capacitor wiring; and

forming a capacitor electrode over the capacitor wiring so that the gate insulating layer is positioned between the capacitor wiring and the capacitor electrode.

wherein the capacitor wiring and the capacitor electrode have a light-transmitting property.

31. The method for manufacturing a semiconductor device according to claim 23, further comprising forming a protective insulating film over the first oxide insulating layer, the first source electrode layer, the first drain electrode layer, and the second oxide insulating layer so as to be in contact with the gate insulating layer.

32. The method for manufacturing a semiconductor device according to claim 23, wherein the second gate electrode layer is formed using a metal layer.

33. The method for manufacturing a semiconductor device according to claim 23 further comprising performing a second heat treatment after forming the first oxide insulating layer.

34. A method for manufacturing a semiconductor device comprising:

forming a first gate electrode layer and a second gate electrode layer over a substrate;

forming a gate insulating layer over the first gate electrode layer and the second gate electrode layer;

forming an oxide semiconductor film over the gate insulating layer;

performing a first heat treatment for dehydration or dehydrogenation on the oxide semiconductor film in a gas selected from a nitrogen gas and an inert gas;

performing a second heat treatment for the oxide semiconductor film after performing the first heat treatment;

forming a conductive film over the oxide semiconductor film;

patterning the conductive film and the oxide semiconductor film to form a second source electrode layer, a second drain electrode layer, a second oxide semiconductor layer over the second gate electrode layer, and to form a first oxide semiconductor layer over the first gate electrode layer;

forming a first oxide insulating layer over the first gate electrode layer, and a second oxide insulating layer over the second gate electrode layer;

forming a first source electrode layer and a first drain electrode layer over the first oxide semiconductor layer and the first oxide insulating layer; and

forming a pixel electrode layer over the first oxide insulating layer, electrically connected to one of the first source electrode layer and the first drain electrode layer.

35. The method for manufacturing a semiconductor device according to claim 34,

wherein the second oxide semiconductor layer has a channel formation region thinner than a region overlapping with the second source electrode layer or the second drain electrode layer, and

wherein a conductive layer is provided over the channel formation region with the second oxide insulating layer therebetween.

36. The method for manufacturing a semiconductor device according to claim 34, wherein the second source electrode layer and the second drain electrode layer are formed using a film comprising an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W or a stacked film including any of these elements.

37. The method for manufacturing a semiconductor device according to claim 34

wherein the conductive film and the oxide semiconductor film are patterned with a resist mask, and

wherein the resist mask is formed using a light-exposure mask, and a half-tone mask or a gray-tone mask is used as the light-exposure mask.

38. The method for manufacturing a semiconductor device according to claim 34, wherein the first source electrode layer, the first drain electrode layer, and the pixel electrode layer are formed using indium oxide, an alloy of indium oxide and tin oxide, an alloy of indium oxide and zinc oxide, or zinc oxide.

39. The method for manufacturing a semiconductor device according to claim 34, further comprising:

forming a capacitor wiring; and

forming a capacitor electrode over the capacitor wiring so that the gate insulating layer is positioned between the capacitor wiring and the capacitor electrode.

wherein the capacitor wiring and the capacitor electrode have a light-transmitting property.

40. The method for manufacturing a semiconductor device according to claim 34, further comprising forming a protective insulating film over the first oxide insulating layer, the first source electrode layer, the first drain electrode layer, and the second oxide insulating layer so as to be in contact with the gate insulating layer.

41. The method for manufacturing a semiconductor device according to claim 34, wherein the second gate electrode layer is formed using a metal layer.

42. The method for manufacturing a semiconductor device according to claim 34 further comprising performing a third heat treatment after forming the first oxide insulating layer.