OXIDE SEMICONDUCTOR FILM AND SEMICONDUCTOR DEVICE

• US 20110068335A1
• Filed: 09/22/2010
• Published: 03/24/2011
• Est. Priority Date: 09/24/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: HIROHASHI, Takuya, AKIMOTO, Kengo, WATANABE, Ryosuke, KISHIDA, Hideyuki, MIYANAGA, Akiharu, YAMAZAKI, Shunpei, SAKAKURA, Masayuki, SAKATA, Junichiro
• Granted Patent: US 8,492,758 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/2636 for heating, e.g. electron beam heating
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/12 characterised by the materials of which they are formed
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.

Claims

1. An oxide semiconductor film comprising:

a needle crystal group on at least one surface side, the needle crystal group growing in a c-axis direction perpendicular to the surface and including an a-b plane parallel to the surface,

wherein a length of a needle crystal in the needle crystal group in the c-axis direction is greater than or equal to five times as long as a length in a direction of an a-axis or a b-axis, and

wherein a region except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed.

2. The oxide semiconductor film according to claim 1, wherein the length of the needle crystal in the direction of the a-axis or the b-axis is greater than or equal to 2 nm and less than or equal to 50 nm.

3. The oxide semiconductor film according to claim 1, wherein a crystal structure of the needle crystal group is represented by In₂Ga₂ZnO₇.

4. The oxide semiconductor film according to claim 1, wherein a molar ratio of In to Ga to Zn of the amorphous region or the region in which amorphousness and microcrystals are mixed is 1:

1;

0.5.

5. The oxide semiconductor film according to claim 1, wherein thickness of the oxide semiconductor film is greater than or equal to 10 nm and less than or equal to 200 nm.

6. A semiconductor device comprising:

a gate electrode layer over an insulating surface;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer;

a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, and are over the gate insulating layer; and

an oxide insulating layer in contact with the oxide semiconductor layer, over the source electrode layer and the drain electrode layer,

wherein the oxide semiconductor layer includes a needle crystal group on at least one surface side, the needle crystal group growing in a c-axis direction perpendicular to the surface and having an a-b plane parallel to the surface,

wherein a length of a needle crystal in the needle crystal group in the c-axis direction is greater than or equal to five times as long as a length in a direction of an a-axis or a b-axis, and

wherein a region except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed.

7. The semiconductor device according to claim 6, wherein the length of the needle crystal in the direction of the a-axis or the b-axis is greater than or equal to 2 nm and less than or equal to 50 nm.

8. The semiconductor device according to claim 6, wherein a crystal structure of the needle crystal group is represented by In₂Ga₂ZnO₇.

9. The semiconductor device according to claim 6, wherein a molar ratio of In to Ga to Zn in a structure of the amorphous region or the region in which amorphousness and microcrystals are mixed is 1:

1;

0.5.

10. The semiconductor device according to claim 6, wherein a thickness of the oxide semiconductor layer is greater than or equal to 10 nm and less than or equal to 200 nm.

11. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

performing heat treatment at a temperature of higher than or equal to 400°

C. and lower than or equal to 700°

C. after the oxide semiconductor layer is formed, so that a needle crystal group including the needle crystal group grown in a c-axis direction perpendicular to the surface and having an a-b plane parallel to the surface and having a length in the c-axis direction greater than or equal to five times as long as a length in a direction of an a-axis or a b-axis is formed on a surface of the oxide semiconductor layer;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer; and

forming an oxide insulating layer in contact with part of the oxide semiconductor layer, over the source electrode layer and the drain electrode layer.

12. The method for manufacturing a semiconductor device, according to claim 11, wherein the heat treatment is performed with an RTA method.

13. The method for manufacturing a semiconductor device, according to claim 11, wherein the heat treatment is performed under a nitrogen atmosphere or a rare gas atmosphere.

14. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

etching the oxide semiconductor layer to have an island shape;

performing heat treatment at a temperature of higher than or equal to 400°

C. and lower than or equal to 700°

C. after the oxide semiconductor layer is formed, so that a needle crystal group including the needle crystal group grown in a c-axis direction perpendicular to the surface and having an a-b plane parallel to the surface and having a length in the c-axis direction greater than or equal to five times as long as a length in a direction of an a-axis or a b-axis is formed on a surface of the oxide semiconductor layer;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer; and

forming an oxide insulating layer in contact with part of the oxide semiconductor layer, over the source electrode layer and the drain electrode layer.

15. The method for manufacturing a semiconductor device, according to claim 14, wherein the heat treatment is performed with an RTA method.

16. The method for manufacturing a semiconductor device, according to claim 14, wherein the heat treatment is performed under a nitrogen atmosphere or a rare gas atmosphere.

17. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

performing heat treatment at a temperature of higher than or equal to 400°

C. and lower than or equal to 700°

C. after the oxide semiconductor layer is formed, so that a needle crystal group including the needle crystal group grown in a c-axis direction perpendicular to the surface and having an a-b plane parallel to the surface and having a length in the c-axis direction greater than or equal to five times as long as a length in a direction of an a-axis or a b-axis is formed on a surface of the oxide semiconductor layer;

etching the oxide semiconductor layer to have an island shape;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer; and

forming an oxide insulating layer in contact with part of the oxide semiconductor layer, over the source electrode layer and the drain electrode layer.

18. The method for manufacturing a semiconductor device, according to claim 17, wherein the heat treatment is performed with an RTA method.

19. The method for manufacturing a semiconductor device, according to claim 17, wherein the heat treatment is performed under a nitrogen atmosphere or a rare gas atmosphere.