Semiconductor device and method for manufacturing same

• US 20110079833A1
• Filed: 12/08/2010
• Published: 04/07/2011
• Est. Priority Date: 02/22/2008
• Status: Active Grant

• Current Assignee: North Plate Semiconductor, LLC
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Murakoshi, Atsushi, Yahashi, Katsunori
• Granted Patent: US 8,178,913 B2
• Time in Patent Office: Days
• US Class Current: 257/292
• CPC Class Codes: H01L 21/76229 Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
• CPC Class Codes: H01L 21/823481 isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

A hard mask material film is formed on a semiconductor substrate and a recess is formed immediately below an opening in an upper surface of the semiconductor substrate. Next, a p-type region is formed immediately below the recess by implanting impurities into an imaging region using the hard mask material film as a mask. Moreover, a trench is formed by further processing the recess in a processing region. A half-buried dielectric film and a STI are formed by burying a dielectric material in the recess and the trench to remove the hard mask material film. Next, two electrodes are formed so as to overlap the half-buried dielectric film and the STI, respectively, and impurities are implanted into the imaging region using one electrode and the half-buried dielectric film as a mask, and hence a n-type region constituting a photodiode is formed in a region being in contact with the p-type region in the semiconductor substrate.

Claims

1-20. -20. (canceled)

21. A semiconductor device, comprising:

a semiconductor substrate;

a first-conductivity-type region formed in an upper portion of the semiconductor substrate and having a first conductivity type;

a second-conductivity-type region formed in an upper portion of the semiconductor substrate, being in contact with the first-conductivity-type region, and having a second conductivity type that is different from the first conductivity type; and

a buried dielectric film provided immediately above the second-conductivity-type region, having a lower portion buried in the semiconductor substrate and an upper portion protruding from an upper surface of the semiconductor substrate, a lower surface of the buried dielectric film being at a level higher than a lower surface of the first-conductive-type region,

the second-conductivity-type region and the buried dielectric film being in contact with the first-conductivity-type region and isolating the first-conductivity-type region from a region that is on opposite side of the first-conductivity-type region across the second-conductivity-type region and is in contact with the second-conductivity-type region.

22. The semiconductor device according to claim 21, further comprising:

an element isolation film having a lower portion buried in the semiconductor substrate, having an upper portion protruding from the upper surface of the semiconductor substrate, and having a lower surface located below a lower surface of the buried dielectric film.

23. The semiconductor device according to claim 22, wherein:

the semiconductor device is an image acquisition device including an imaging region configured to convert incident light to an electrical signal and a processing region configured to process the electrical signal,

the first-conductivity-type region constitutes a photodiode provided in the imaging region, and

the element isolation film isolates elements provided in the processing region from each other.

24. The semiconductor device according to claim 21, further comprising:

an inversion layer of the second-conductivity-type region formed in an upper portion the first-conductivity-type region; and

a transistor having a source/drain region in contact with the second-conductivity-type region and the buried dielectric film,

wherein the lower surface of the buried dielectric film is located;

below a position where impurity concentration is maximized in an impurity concentration profile along depth of the inversion layer,

below a position where impurity concentration is maximized in an impurity concentration profile along depth of the source/drain region, and

above a position where impurity concentration is maximized in an impurity concentration profile along depth of the first-conductivity-type region.

25. The semiconductor device according to claim 24, wherein the position where impurity concentration is maximized in an impurity concentration profile along depth of the first-conductivity-type region is located below the position where impurity concentration is maximized in an impurity concentration profile along depth of the source/drain region.

26. The semiconductor device according to claim 21, wherein an angle that a direction being parallel to the upper surface of the semiconductor substrate and directed from an outer edge of the buried dielectric film to its center makes with a downward direction parallel to a side surface of the buried dielectric film is 73°

to 90°

.

27. The semiconductor device according to claim 21, further comprising:

a buffer dielectric film covering the lower portion of the buried dielectric film and formed from a dielectric material that is different from the material of the buried dielectric film.

28. The semiconductor device according to claim 27, wherein the buried dielectric film is formed from silicon oxide, and the buffer dielectric film is formed from silicon nitride.

29. The device according to claim 27, further comprising:

an element isolation film having a lower portion buried in the semiconductor substrate, having an upper portion protruding from the upper surface of the semiconductor substrate, and having a lower surface located below a lower surface of the buried dielectric film.

30. The device according to claim 29, wherein:

the semiconductor device is an image acquisition device including an imaging region configured to convert incident light to an electrical signal and a processing region configured to process the electrical signal,

the first-conductivity-type region constitutes a photodiode provided in the imaging region, and

the element isolation film isolates elements provide in the processing region from each other.

31. The semiconductor device according to claim 30, further comprising:

an inversion layer of the second conductivity type formed in an upper portion of the first-conductivity-type region; and

a transistor having a source/drain region in contact with the second-conductivity-type region and the buried dielectric film,

wherein the lower surface of the buried dielectric film is located;

below a position where impurity concentration is maximized in an impurity concentration profile along depth of the inversion layer,

below a position where impurity concentration is maximized in an impurity concentration profile along depth of the source/drain region, and

above a position where impurity concentration is maximized in an impurity concentration profile along depth of the first-conductivity-type region.

32. The semiconductor device according to claim 27, wherein an angle that a direction being parallel to the upper surface of the semiconductor substrate and directed from an outer edge of the buried dielectric film to its center makes with a downward direction parallel to a side surface of the buried dielectric film is 73°

to 90°

.