INTEGRATED MULTI-INDUCTOR MAGNETIC MEMBER AND MULTI-LOOP POWER FACTOR CORRECTION CIRCUIT HAVING SAME

• US 20110116292A1
• Filed: 11/17/2010
• Published: 05/19/2011
• Est. Priority Date: 11/19/2009
• Status: Active Grant

• Current Assignee: Delta Electronics Incorporated
• Original Assignee: Delta Electronics Incorporated
• Inventors: Chang, Shih-Hsien, Tsai, Hsin-Wei
• Granted Patent: US 8,324,871 B2
• Time in Patent Office: Days
• US Class Current: 363/126
• CPC Class Codes: H01F 17/04 with magnetic core
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: H02M 7/003 Constructional details, e.g. physical layout, assembly, wiring or busbar connections
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A multi-loop power factor correction circuit includes a first rectifier circuit, an integrated multi-inductor magnetic member, plural switching circuits, plural rectifying elements, and a power factor correction controlling circuit. The integrated multi-inductor magnetic member includes a first slab, a second slab, a middle post, plural lateral posts, and plural winding coil assemblies. The winding coil assemblies are wound around respective lateral posts to form at least a first inductor and a second inductor. The magnetic flux cross-section area of the middle post is smaller than the sum of the magnetic flux cross-section areas of the lateral posts. The switching circuits are alternately conducted, so that the distribution of an input AC current is similar to the waveform of the input AC voltage.

Claims

1. A multi-loop power factor correction circuit comprising:

a first rectifier circuit for rectifying an input AC voltage into a rectified voltage;

an integrated multi-inductor magnetic member comprising a first slab, a second slab, a middle post between said first slab and said second slab, plural lateral posts between said first slab and said second slab, and plural winding coil assemblies, wherein said winding coil assemblies are wound around respective lateral posts to form at least a first inductor and a second inductor, a first terminal of said first inductor and a first terminal of said second inductor are connected to said first rectifier circuit, a second terminal of said first inductor and a second terminal of said second inductor are respectively connected to a first connecting node and a second connecting node, and the magnetic flux cross-section area of said middle post is smaller than the sum of the magnetic flux cross-section areas of said lateral posts;

plural switching circuits comprising at least a first switching circuit and a second switching circuit, wherein said first switching circuit and said second switching circuit are respectively connected to said first connecting node and said second connecting node;

plural rectifying elements comprising at least a first rectifying element and a second rectifying element, wherein said first rectifying element is interconnected between said first connecting node and a power output terminal, and said second rectifying element is interconnected between said second connecting node and said power output terminal; and

a power factor correction controlling circuit connected to a common terminal, said first rectifier circuit and control terminals of said switching circuits, wherein said switching circuits are alternately conducted, so that the distribution of an input AC current is similar to the waveform of said input AC voltage.

2. The multi-loop power factor correction circuit according to claim 1 wherein the magnetic flux cross-section area of each of said lateral posts and the magnetic flux cross-section area of said middle post are identical.

3. The multi-loop power factor correction circuit according to claim 1 wherein the magnetic flux cross-section area of said middle post is 1˜

1.2 times of the magnetic flux cross-section area of each of said lateral posts.

4. The multi-loop power factor correction circuit according to claim 1 wherein the distances of said lateral posts relative to said middle post are identical.

5. The multi-loop power factor correction circuit according to claim 1 wherein said plural lateral posts comprises a first lateral post and a second lateral post, and a first magnetic path defined by a portion of said first slab, a portion of said second slab, said middle post and said first lateral post is the same as a second magnetic path defined by a portion of said first slab, a portion of said second slab, said middle post and said second lateral post.

6. The multi-loop power factor correction circuit according to claim 1 wherein said first slab, said second slab, said middle post and said lateral posts are assembled into a magnetic core assembly.

7. The multi-loop power factor correction circuit according to claim 1 wherein said plural lateral posts comprises a first lateral post and a second lateral post, and each of said middle post, said first lateral post and said second lateral post comprises an upper portion and a lower portion, wherein said upper portion of said middle post, said upper portion of said first lateral post, said upper portion of said second lateral post and said first slab are integrated into a first magnetic core, and said lower portion of said middle post, said lower portion of said first lateral post, said lower portion of said second lateral post and said second slab are integrated into a second magnetic core.

8. The multi-loop power factor correction circuit according to claim 1 wherein said plural winding coil assemblies have the same turn number.

9. The multi-loop power factor correction circuit according to claim 1 wherein said plural inductors have the same inductance value.

10. The multi-loop power factor correction circuit according to claim 1 wherein each of said winding coil assemblies is produced by winding a flat copper coil or a circular copper coil, which has been subject to surface insulation treatment.

11. The multi-loop power factor correction circuit according to claim 1 further comprising an output capacitor, which is interconnected between said power output terminal and said common terminal.

12. The multi-loop power factor correction circuit according to claim 1 wherein said power factor correction controlling circuit comprises:

an input waveform-detecting circuit connected to said first rectifier circuit for generating an input detecting signal having the same waveform as said rectified voltage;

a feedback circuit for generating a feedback signal according to an output DC voltage that is outputted from said power output terminal; and

a power factor correction controller for controlling said plural switching circuits to be alternately conducted or shut off according to said feedback signal and said input detecting signal, so that the distribution of said input AC current is similar to the waveform of said input AC voltage.

13. The multi-loop power factor correction circuit according to claim 12 further comprising:

a first current-detecting circuit connected to said first switching circuit for detecting a first current flowing in said first inductor, thereby generating a first current-detecting signal; and

a second current-detecting circuit connected to said second switching circuit for detecting a second current flowing in said second inductor, thereby generating a second current-detecting signal.

14. The multi-loop power factor correction circuit according to claim 13 wherein according to said first current-detecting signal and said second current-detecting signal, said power factor correction controller discriminates a relation between said first current and said second current to control duty cycles of said first switching circuit and said second switching circuit, so that said output DC voltage is maintained at a rated voltage value and the distribution of said input AC current is similar to the waveform of said input AC voltage.

15. The multi-loop power factor correction circuit according to claim 14 wherein said first current-detecting circuit and said second current-detecting circuit are respectively a first detecting resistor and a second detecting resistor.

16. The multi-loop power factor correction circuit according to claim 12 wherein said input waveform-detecting circuit and said feedback circuit are voltage division circuits.

17. The multi-loop power factor correction circuit according to claim 12 wherein said input waveform-detecting circuit comprises:

a second rectifier circuit connected to an input terminal of said first rectifier circuit for rectification; and

a voltage division circuit connected to said second rectifier circuit and said power factor correction controller for performing voltage division and filtering high-frequency noise, thereby generating said input detecting signal.

18. The multi-loop power factor correction circuit according to claim 1 further comprising a rectified current-detecting circuit interconnected between a negative output terminal of said first rectifier circuit and said common terminal for detecting a rectified current, thereby generating a corresponding rectified current-detecting signal, wherein according to said rectified current-detecting signal, said power factor correction controlling circuit discriminates a relation between the currents flowing in said first inductor and said second inductor to control duty cycles of said first switching circuit and said second switching circuit, so that the distribution of said input AC current is similar to the waveform of said input AC voltage.

19. The multi-loop power factor correction circuit according to claim 1 further comprising a first loop and a second loop, wherein said first inductor is included in said first loop, said second inductor is included in said second loop, and said first inductor and said second inductor are alternately charged during operation of said multi-loop power factor correction circuit.

20. An integrated multi-inductor magnetic member for use in a multi-loop power factor correction circuit, said integrated multi-inductor magnetic member comprising:

a first slab;

a second slab;

a middle post arranged between said first slab and said second slab;

plural lateral posts arranged between said first slab and said second slab, wherein the magnetic flux cross-section area of said middle post is smaller than the sum of the magnetic flux cross-section areas of said lateral posts; and

plural winding coil assemblies wound around respective lateral posts to form at least a first inductor and a second inductor, wherein said first inductor and said second inductor are respectively included in a first loop and second loop of said multi-loop power factor correction circuit, and said first inductor and said second inductor are alternately charged during operation of said multi-loop power factor correction circuit.