METHOD AND SYSTEM FOR ARTIFICALLY AND DYNAMICALLY LIMITING THE FRAMERATE OF A GRAPHICS PROCESSING UNIT

• US 20110157191A1
• Filed: 12/30/2009
• Published: 06/30/2011
• Est. Priority Date: 12/30/2009
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Saulters, Scott, Huang, Jensen, Diard, Franck
• Granted Patent: US 9,256,265 B2
• Time in Patent Office: Days
• US Class Current: 345/503
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode

Abstract

Embodiments of the present invention are directed to provide a method and system for applying automatic power conservation techniques in a computing system. Embodiments are described herein that automatically limits the frame rate of an application executing in a discrete graphics processing unit operating off battery or other such exhaustible power source. By automatically limiting the frame rate in certain detected circumstances, the rate of power consumption, and thus, the life of the current charge stored in a battery may be dramatically extended. Another embodiment is also provided which allows for the more effective application of automatic power conservation techniques during detected periods of inactivity by applying a low power state immediately after a last packet of a frame is rendered and displayed.

Claims

1. A method for limiting the frame rate of a graphics processing unit, the method comprising:

in a computer system comprising an integrated graphics processing unit (GPU) and a discrete GPU, querying a current power source of the computer system to determine if the current power source has changed since a most recent power source query;

in the event the current power source has changed since the most recent power source query, determining if the computer system is being powered by a first power source of a plurality of power sources;

in the event the power source comprises the first power source of the plurality of power sources, determining if the discrete GPU is currently in operation; and

automatically limiting the frame rate of the discrete GPU if the frame rate is above a second threshold value in response to a determination that the discrete GPU is currently in operation.

2. The method of claim 1, wherein the first threshold value is user programmable.

3. The method of claim 1 further comprising:

generating a timestamp for a current frame of an application in response to rendering being completed for a current frame;

comparing the timestamp for the current frame to a timestamp of a previous frame corresponding to the most recent power source query to determine if a duration of elapsed time between the respective timestamps exceeds a first threshold value;

wherein the querying, the determining in the event the duration of time between the timestamps for the current and previous frame corresponding to a most recent power source query exceeds the first threshold value,

4. The method of claim 1, wherein the limiting the frame rate comprises:

determining a current frame rate; and

stalling a command thread of the GPU if the current frame rate is greater than the second threshold.

5. The method of claim 4, wherein the determining a current frame rate comprises calculating the current frame rate from a plurality of collected timestamps corresponding to recent frames of the application.

6. The method of claim 4 wherein the stalling the command thread of the GPU comprises:

inhibiting the transfer of byte code comprising the plurality of commands in a command buffer to the GPU to a frequency that results to a frame rate below the second threshold.

7. The method of claim 1, wherein the first power source comprises a direct current (DC) power source.

8. The method of claim 1, wherein the first power source does not comprise an alternating current (AC) power source.

9. The method of claim 1, wherein a vertical synchronization feature is not in operation for the computer system.

10. A system for limiting the frame rate of a graphics processing unit to reduce power consumption comprising:

a plurality of graphics processing units comprising a first graphics processing unit and a second graphics processing unit, for rendering graphical output;

a display device for displaying graphical output received from a currently operating graphics processing unit of the plurality of graphics processing units;

a central processing unit for distributing a plurality of packets comprising a plurality of rendering instructions to currently operating graphics processing unit;

a plurality of frame buffers respectively comprised in, and corresponding to, the plurality of graphics processing units for storing a plurality of graphics rendering instructions; and

a plurality of power sources for providing an operating power source to the system, the plurality of power sources comprising a first power source and a second power source;

wherein, in response to detecting a change in the operating power source from the first power source to the second power source, a frame rate of the second graphics processing unit is artificially limited to a threshold value if the second graphics processing unit is determined to be the currently operating graphics processing unit.

11. The system of claim 10, wherein the first graphics processing unit is an integrated graphics processing unit.

12. The system of claim 10, wherein the second graphics processing unit is a discrete graphics processing unit.

13. The system of claim 10, wherein the first power source comprises a direct current power source.

14. The system of claim 10, wherein the second power source comprises an alternating current power source.

15. The system of claim 10, wherein the frame rate of the seconds graphics processing unit is limited by delaying a distribution of the plurality of graphics rendering packets from the central processing unit to the second graphics processing unit to achieve a frame rate produced by the second graphics processing unit below the threshold value.

16. A method for reducing the rate of power consumption of a graphics processing unit, the method comprising:

in a computer system comprising an integrated graphics processing unit (GPU) and a discrete GPU, receiving a packet of a plurality of packets corresponding to a first frame in a discrete GPU, the packet comprising a plurality of rendering instructions;

determining if the packet is a flagged packet;

in the event the packet is the flagged packet, determining a type of power source currently supplying power to the computer system; and

in response to determining the type of power source currently supplying power to the computer system comprises a battery-operated power source, immediately achieving a low power state in the discrete GPU upon the GPU finishing rendering data based on the flagged packet.

17. The method of claim 16, wherein the determining if the packet is a flagged packet in the plurality of packets comprises detecting a presence of a flagged packet.

18. The method of claim 16, wherein the immediately achieving a low power state comprises:

determining an expected duration of time until a packet of the plurality of packets corresponding to a second frame is received according to a schedule;

operating the discrete GPU in the low power state for the expected duration of time.

19. The method of claim 16, wherein a packet of the plurality of packets is received in a frame buffer of the discrete GPU.

20. The method of claim 19, wherein the first frame comprises graphical output for an application executing on the computer system in full-screen display mode.