METHODS FOR VOICE COMMUNICATION THROUGH PERSONAL EMERGENCY RESPONSE SYSTEM

• US 20110158430A1
• Filed: 11/02/2010
• Published: 06/30/2011
• Est. Priority Date: 10/24/2006
• Status: Active Grant

• Current Assignee: Medapps Incorporated (Abbott Laboratories Incorporated)
• Original Assignee: Medapps Incorporated (Abbott Laboratories Incorporated)
• Inventors: Dicks, Kent E., Bartlett, Terry, Tripp, Robert, Kent, Ralph, Crosley, Thomas
• Granted Patent: US 9,543,920 B2
• Time in Patent Office: Days
• US Class Current: 381/104
• CPC Class Codes: H03G 3/341 Muting when no signals or only weak signals are present H03G3/344, H03G3/345 take precedence

Abstract

A system according to an aspect of the present invention switches between the activation/deactivation of the speaker and microphone in speakerphone mode to help ensure the quality of audio communications. The system includes a processor, a microphone, a speaker, and a data relay transceiver. The microphone, speaker, and data relay transceiver are each in communication with the processor. The system further includes a memory in communication with the processor which stores instructions that, when executed by the processor, cause the processor to determine a threshold based on an average amplitude of a signal provided to the speaker by the data relay transceiver; sample the amplitude of the signal; and disable the microphone and enable the speaker if the sampled amplitude is greater than the threshold.

Claims

1. A system, comprising:

a processor;

a microphone in communication with the processor;

a speaker in communication with the processor;

a data relay transceiver in communication with the processor; and

a memory in communication with the processor and storing instructions that, when executed by the processor, cause the processor to;

determine a threshold based on an average amplitude of a signal provided to the speaker by the data relay transceiver;

sample the amplitude of the signal; and

disable the microphone and enable the speaker if the sampled amplitude is greater than the threshold.

2. The system of claim 1, wherein the memory further stores instructions to cause the processor to disable the speaker and enable the microphone if the sampled amplitude is not greater than the threshold.

3. The system of claim 2, wherein the memory further stores instructions to cause the processor to delay, by a predetermined period of time, before disabling the speaker and enabling the microphone.

4. The system of claim 3, wherein the predetermined period of time is between about 1 ms and about 300 ms.

5. The system of claim 1, wherein the memory further stores instructions to cause the processor to determine the average amplitude of the signal based on a first amplitude of the signal sampled at a first time and a second amplitude of the signal sampled at a second time, the second time greater than the first time.

6. The system of claim 1, wherein the memory further stores instructions to cause the processor to sample a plurality of amplitudes of the signal, wherein each of the plurality of samplings is delayed by a predetermined period of time.

7. The system of claim 6, wherein the predetermined period of time between samplings is at least 200 ms.

8. The system of claim 6, wherein the memory further stores instructions to cause the processor to disable the microphone and enable the speaker only when the amplitude of at least two of the plurality of samplings are greater than the threshold.

9. The system of claim 1, wherein the memory further stores instructions to cause the processor to delay, by a predetermined period of time, before disabling the microphone and enabling the speaker.

10. The system of claim 9, wherein the predetermined period of time is between about 1 ms and about 300 ms.

15. The system of claim 1, wherein when the microphone is disabled, audio received by the microphone is not transmitted through the data relay transceiver.

16. The system of claim 15, wherein the memory further stores instructions to cause the processor to disable the speaker and enable the microphone when the microphone receives audio above a predetermined volume level.

17. The system of claim 1, wherein the memory further stores instructions to cause the processor to:

receive, through the data relay transceiver, a request for override; and

disable the microphone and enable the speaker in response to the request for override.

18. The system of claim 17, wherein the memory further stores instructions to cause the processor to disable the microphone and enable the speaker until a request to remove the override is received by the processor through the data relay transceiver.

19. The system of claim 18, wherein the memory further stores instructions to cause the processor to provide, through the data relay transceiver, a warning if a request to remove the override has not been received for a predetermined period of time.

20. The system of claim 17, wherein the memory further stores instructions to cause the processor to disable the microphone and enable the speaker for a predetermined period of time after the request for override is received.

11. The system of claim, further comprising an override controller in communication with the processor, wherein the memory further stores instructions to cause the processor to:

detect activation of the override controller by a user of the system; and

disable the speaker and enable the microphone in response to the activation of the override controller.

12. The system of claim 11, wherein the memory further stores instructions to cause the processor to disable the speaker and enable the microphone as long as the override controller is activated.

13. The system of claim 12, wherein the memory further stores instructions to cause the processor to provide, through the speaker, a warning to the user of the system when the override controller is activated for a predetermined period of time.

14. The system of claim 11, wherein the memory further stores instructions to cause the processor to disable the speaker and enable the microphone for a predetermined period of time after the user activates the override controller.