High Speed Processing of Financial Information Using FPGA Devices

• US 20110184844A1
• Filed: 03/31/2011
• Published: 07/28/2011
• Est. Priority Date: 06/19/2006
• Status: Active Grant

• Current Assignee: Exegy Incorporated
• Original Assignee: Exegy Incorporated
• Inventors: Parsons, Scott, Chamberlain, Roger D., Taylor, David E., Schuehler, David Vincent, Franklin, Mark A.
• Granted Patent: US 8,595,104 B2
• Time in Patent Office: Days
• US Class Current: 705/35
• CPC Class Codes: G06Q 40/00 Finance; Insurance; Tax strategies; Processing of corporate or income taxes
• CPC Class Codes: G06Q 40/04 Trading; Exchange, e.g. stocks, commodities, derivatives or currency exchange
• CPC Class Codes: G06Q 40/06 Asset management; Financial planning or analysis

Abstract

A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a record memory is employed to store a plurality of records for a plurality of financial instruments, and a reconfigurable logic device is employed to (1) receive financial market data messages, (2) retrieve from the record memory the records for the messages'"'"' associated financial instruments, (3) process each received financial market data message to update the record for the financial instrument associated with that message, and wherein each record comprises an interest list that identifies whether any of a plurality of entities have expressed an interest in being notified of data relating to the updated record.

Claims

1. An apparatus for processing a plurality of financial market data messages, each financial market data message comprising financial market data and being associated with a financial instrument, the apparatus comprising:

a record memory configured to store a plurality of records for a plurality of financial instruments;

a reconfigurable logic device in communication with the record memory, wherein the reconfigurable logic device is configured to (1) receive the financial market data messages, (2) retrieve from the record memory the records for the messages'"'"' associated financial instruments, (3) process each received financial market data message to update the record for the financial instrument associated with that message, and wherein each record comprises an interest list that identifies whether any of a plurality of entities have expressed an interest in being notified of data relating to the updated record.

2. The apparatus of claim 1 wherein the interest list comprises a bit vector having a plurality of bit positions, wherein each bit position corresponds to a different entity, and wherein a bit value at each bit position determines whether the entity corresponding to that bit position is an interested entity.

3. An apparatus for processing financial market data messages, each financial market data message comprising financial market data and being associated with an interest list and entitlement list, each interest list identifying whether any of a plurality of entities have expressed an interest in being notified of data relating to its associated message, each entitlement list identifying whether any of a plurality of entities are entitled to be notified of data relating to its associated message, the apparatus comprising:

a reconfigurable logic device configured to (1) receive a plurality of the messages, and (2) perform interest and entitlement filtering on the received messages in response to each message'"'"'s associated interest list and entitlement list.

4. The apparatus of claim 3 wherein the interest list comprises a bit vector having a plurality of bit positions, wherein each bit position corresponds to a different entity, and wherein a bit value at each bit position determines whether the entity corresponding to that bit position is an interested entity.

5. The apparatus of claim 4 wherein the entitlement list comprises a bit vector having a plurality of bit positions, wherein each bit position corresponds to a different entity, and wherein a bit value at each bit position determines whether the entity corresponding to that bit position is an entitled entity.

6. The apparatus of claim 5 wherein the same bit positions in the interest lists and the entitlement lists for each message correspond to the same entities.

7. The apparatus of claim 6 wherein the reconfigurable logic device is further configured to perform the interest and entitlement filtering by performing, for each message, a bitwise AND operation on the entitlement list bit vector and the interest list bit vector associated with that message to thereby generate an entitled interest list bit vector, wherein the bit values at the different bit positions of the entitled interest list bit vector identify which interested entities are entitled to be notified of data relating to that message.

8. The apparatus of claim 6 wherein the reconfigurable logic device is further configured to (1) operate on a plurality of different interest list bit vectors that are associated with each message, and (2) for each message, perform a bitwise OR operation on the plurality of interest list bit vectors for the same message to thereby generate a composite interest list bit vector for each message.

9. The apparatus of claim 8 wherein the reconfigurable logic device is further configured to perform the interest and entitlement filtering by performing, for each message, a bitwise AND operation on the entitlement list bit vector and the composite interest list bit vector associated with that message to thereby generate an entitled interest list bit vector, wherein the bit values at the different bit positions of the entitled interest list bit vector identify which interested entities are entitled to be notified of data relating to that message.

10. The apparatus of claim 9 wherein at least one of the plurality of interest list bit vectors comprises an exchange interest list bit vector.

11. The apparatus of claim 10 wherein the reconfigurable logic device is further configured to, for each message, (1) receive an exchange identifier associated therewith, and (2) retrieve an exchange interest list bit vector from a table based on the received exchange identifier for that message.

12. The apparatus of claim 3 wherein the reconfigurable logic device is further configured to drop a message if the interest and entitlement filtering results in a determination that no entitled and interested party is to be notified of data relating to that message.

13. A method for processing financial market data messages, each financial market data message comprising financial market data and being associated with an interest list and entitlement list, each interest list identifying whether any of a plurality of entities have expressed an interest in being notified of data relating to its associated message, each entitlement list identifying whether any of a plurality of entities are entitled to be notified of data relating to its associated message, the method comprising:

receiving a plurality of the messages; and

performing interest and entitlement filtering with reconfigurable logic on the received messages in response to each message'"'"'s associated interest list and entitlement list.