SELF-DRIVEN AC-DC SYNCHRONOUS RECTIFIER FOR POWER APPLICATIONS

• US 20110199799A1
• Filed: 10/06/2010
• Published: 08/18/2011
• Est. Priority Date: 02/12/2010
• Status: Active Grant

• Current Assignee: City University of Hong Kong
• Original Assignee: City University of Hong Kong
• Inventors: Hui, Shu Yuen Ron, Choi, Ho Wing, Zhong, Wenxing
• Granted Patent: US 8,913,409 B2
• Time in Patent Office: Days
• US Class Current: 363/127
• CPC Class Codes: H02M 7/06 using discharge tubes without control electrode or semiconductor devices without control electrode
• CPC Class Codes: H02M 7/217 using semiconductor devices only
• CPC Class Codes: H02M 7/2173 in a biphase or polyphase circuit arrangement H02M7/2176 takes precedence; voltage multipliers H02M7/25
• CPC Class Codes: H02M 7/219 in a bridge configuration
• CPC Class Codes: H02M 7/2195 the switches being synchronously commutated at the same frequency of the AC input voltage
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

Systems, methods, and devices that employ self-driven gate-drive circuitry to facilitate controlling power switches to emulate a diode bridge to synchronously rectify a power signal are presented. A single-phase or multi-phase synchronous rectifier can comprise at least a first pair of switches of a first conducting path and a second pair of switches of a second conducting path that can form or emulate a diode bridge. To facilitate emulating turn-on and turn-off conditions of a diode, a switch can be turned on when voltage across the switch is forward-biased and turned off when switch current is reversed; also, there can be at least one current-controlled switch in each conducting path. Self-driven gate-drive circuitry employs low power components that can facilitate controlling respective switching of the at least first pair and second pair of switches, wherein switching of the switches is also controlled at start-up to emulate a diode bridge.

Claims

1. A system that facilitates synchronous rectification of a power signal, comprising:

a subset of power switches configured to receive an input power signal and rectify the input power signal to generate a rectified power signal as an output; and

a self-driven gate-drive (SDGD) subsystem configured to facilitate control of respective switching of respective power switches in the subset of power switches, wherein the SDGD subsystem is powered by the rectified power signal or the input power signal.

2. The system of claim 1, wherein the subset of power switches is further configured to comprise a first high-side power switch, at least one other high-side power switch, a first low-side power switch, and at least one other low-side power switch that are arranged and associated with each other in a form such that the subset of power switches is configured to function as a diode bridge to facilitate rectification of the input power signal to generate the rectified power signal.

3. The system of claim 2, the input power signal is a multi-phase power signal, which has at least three phases, wherein the subset of power switches is further configured to comprise a first high-side power switch, a second high-side power switch, at least a third high-side power switch, a first low-side power switch, a second low-side power switch, and at least a third low-side power switch that are arranged and associated with each other in a form such that the subset of power switches is configured to function as a diode bridge to facilitate rectification of the multi-phase power signal to generate the rectified power signal.

4. The system of claim 2, wherein the first high-side power switch and the at least one other high-side power switch are respectively configured to be a voltage-controlled self-driven switches, and the first low-side power switch and the at least one other low-side power switch are respectively configured to be a current-controlled self-driven switches.

5. The system of claim 4, wherein the SDGD subsystem is further configured to comprise:

a first high-side SDGD component, at least one other high-side SDGD component, a first low-side SDGD component, and at least one other low-side SDGD component, wherein the first high-side SDGD component is configured to comprise voltage-controlled gate-drive circuitry and is associated with the first high-side power switch, the at least one other high-side SDGD component is configured to comprise voltage-controlled gate-drive circuitry and is associated with the at least one other high-side power switch, the first low-side SDGD component is configured to comprise current-controlled gate-drive circuitry and is associated with the first low-side power switch, and the at least one other SDGD component is configured to comprise current-controlled gate-drive circuitry and is associated with the at least one other low-side power switch.

6. The system of claim 5, wherein at least one of the first high-side SDGD component, the at least one other high-side SDGD component, the first low-side SDGD component, or the at least one other low-side SDGD component, is further configured to receive at least a portion of the rectified power signal to facilitate operation of the at least one of the first high-side SDGD component, the at least one other high-side SDGD component, the first low-side SDGD component, or the at least one other low-side SDGD component.

7. The system of claim 4, wherein at least one of the first high-side power switch or the at least one other high-side power switch is respectively configured to be switched from an off state to an on state in response to reception of a forward-biased voltage that at least meets an applicable predefined gate threshold switching voltage level;

and at least one of the first low-side power switch or the at least one other low-side power switch is further configured to be switched from an on state to an off state when current in the at least one of the first low-side power switch or the at least one other low-side power switch is reversed.

8. The system of claim 4, wherein the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, and the at least one other low-side power switch are arranged in a circuit in relation to each other to facilitate function of the subset of power switches as a diode bridge in order to facilitate rectification of the input power signal to generate the rectified power signal, during a start-up phase of operation prior to steady-state operation of the SDGD subsystem.

9. The system of claim 4, wherein the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, and the at least one other low-side power switch are further configured to each include a respective body diode to facilitate function of the subset of power switches as a diode bridge in order to facilitate rectification of the input power signal to generate the rectified power signal, during a start-up phase of operation prior to steady-state operation of the SDGD subsystem.

10. The system of claim 1, wherein the self-driven gate-drive (SDGD) subsystem is further configured to include a high-side SDGD portion and a low-side SDGD portion that are symmetrical.

11. The system of claim 1, wherein the input power signal has a voltage level that is at, or is substantially close to, 110 volts, 220 volts, or a voltage above 100 volts.

12. The system of claim 1, wherein at least one power switch of the subset of power switches is further configured to be a metal-oxide-semiconductor field-effect transistor (MOSFET) switch.

13. A method for rectifying an input power signal, further comprising:

generating a rectified power signal from the input power signal received by a subset of power switches, wherein power switches in the subset are arranged in relation to each other to emulate functionality of a diode rectifier; and

supplying at least a portion of the rectified power signal to a self-driven gate-drive (SDGD) subsystem associated with the subset of power switches to facilitate controlling respective switching of respective power switches of the subset of power switches.

14. The method of claim 13, further comprising:

controlling at least one of a first high-side power switch and at least one other high-side power switch to switch from an off state to an on state in response to receiving of a forward-biased voltage that at least meets an applicable predefined gate threshold switching voltage level; and

controlling at least one of a first low-side power switch and at least one other low-side power switch to switch from an on state to an off state in response to sensing a reversing of current in the at least one of a first low-side power switch and at least one other low-side power switch, wherein the subset of power switches comprising the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, and the at least one other low-side power switch.

15. The method of claim 13, further comprising:

controlling switching of at least one of the first high-side power switch or the at least one other high-side power switch so the at least one of the first high-side power switch or the at least one other high-side power switch is in an off state, during at least one period of time when the SDGD subsystem is not operating at steady state, wherein the subset of power switches comprising the first high-side power switch and the at least one other high-side power switch.

16. The method of claim 13, further comprising:

controlling switching of at least one of the first low-side power switch or the at least one other low-side power switch so the at least one of the first low-side power switch or the at least one other low-side power switch is in an off state, during at least one period of time when the SDGD subsystem is not operating at steady state, wherein the subset of power switches comprising the first low-side power switch and the at least one other low-side power switch.

17. The method of claim 13, further comprising:

receiving the input power signal having a voltage level that is at, or is substantially close to, 110 volts, 220 volts, or a voltage above 100 volts.

18. A self-driven synchronous rectifier device, comprising:

a subset of switches that is configured to receive an input voltage signal and rectify the input voltage signal to generate a rectified voltage signal as an output; and

a self-driven gate-drive (SDGD) subsystem that is configured to control respective switching of respective switches in the subset of switches, wherein the SDGD subsystem is further configured to receive at least a portion of the rectified voltage signal.

19. The synchronous rectifier device of claim 18, wherein the subset of switches is further configured to comprise a first high-side switch, at least one other high-side switch, a first low-side switch, and at least one other low-side switch that are arranged and associated with each other in a form such that the subset of switches is configured to operate as a diode bridge to facilitate rectification of the input voltage signal to generate the rectified voltage signal.

20. The synchronous rectifier device of claim 18, wherein the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, and the at least one other low-side power switch are arranged in a circuit in relation to each other to maintain the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, and the at least one other low-side power switch in an off state, during at least one period of time when the SDGD subsystem is not operating at steady state, to facilitate function of the subset of power switches as a diode bridge in order to facilitate rectification of the input power signal to generate the rectified power signal.