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SECURED COPROCESSOR COMPRISING AN EVENT DETECTION CIRCUIT

  • US 20110214012A1
  • Filed: 04/19/2011
  • Published: 09/01/2011
  • Est. Priority Date: 04/05/2005
  • Status: Active Grant
First Claim
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1. A coprocessor comprising:

  • a calculation unit configured to execute at least one command; and

    a securization device including;

    an error detection circuit configured to monitor an execution of the command so as to detect any execution error, to put the coprocessor into an error mode by default as soon as the execution of the command begins, and to lift the error mode at an end of the execution of the command if no error has been detected;

    an event detection circuit configured to detect an appearance of at least one particular event; and

    a masking circuit configured to mask the error mode while the particular event does not happen, and to declare the error mode to an outside of the coprocessor if the particular event happens while the coprocessor is in the error mode.

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