Method and Apparatus Improving Gate Oxide Reliability by Controlling Accumulated Charge

• US 20110227637A1
• Filed: 02/15/2011
• Published: 09/22/2011
• Est. Priority Date: 07/11/2005
• Status: Active Grant

• Current Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Original Assignee: Peregrine Semiconductor Corporation (Murata Manufacturing Co Limited)
• Inventors: Stuber, Michael A., Imthurn, George P., Dribinsky, Alexander, Kelly, Dylan J., Brindle, Christopher N., Burgener, Mark L., Kemerling, Clint L., Kim, Tae Youn
• Granted Patent: US 8,954,902 B2
• Time in Patent Office: Days
• US Class Current: 327/546
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78615 with a body contact
• CPC Class Codes: H01L 29/78651 Silicon transistors H01L29/78606 - H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78654 Monocrystalline silicon transistors
• CPC Class Codes: H01L 29/78657 SOS transistors
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit

Abstract

A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

Claims

1. A circuit, comprising:

a) a semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) operating in an accumulated charge regime; and

b) a means for accumulated charge control (ACC) operatively coupled to the SOI MOSFET, wherein the means for ACC comprises a control circuit operatively coupled to a gate of the SOI MOSFET, wherein the control circuit applies a voltage pulse to the gate that switches the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for a selected interval.

2. The circuit of claim 1, wherein the SOI MOSFET comprises an N MOSFET.

3. The circuit of claim 1, wherein the SOI MOSFET comprises a P MOSFET.

4. The circuit of claim 1, wherein the SOI MOSFET comprises an SOI MOSFET selected from the following types:

a silicon-on-sapphire (SOS) SOI MOSFET, a silicon-germanium (SiGe) SOI MOSFET, a Separation by Implantation of Oxygen (SIMOX) SOI MOSFET, and a silicon bonded to insulator SOI MOSFET.

5. The circuit of claim 1, wherein the circuit comprises a circuit selected from the following types:

an RF switching circuit, an RF mixer, a power amplifier, a level shifting circuit, a negative voltage generator, an oscillator, and a DC-DC converter.

6. A circuit, comprising:

a) a semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) operating in an accumulated charge regime; and

b) a means for accumulated charge control (ACC) operatively coupled to the SOI MOSFET, wherein the means for ACC comprises a resistor electrically connected to a gate of the SOI MOSFET, wherein the resistance value of the resistor is sufficient to prevent attenuation of an induced RF voltage on the gate, and wherein an RF signal voltage having a selected frequency is applied to a drain of the SOI MOSFET thereby generating the induced RF voltage, and wherein the induced RF voltage transitions the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for at least part of a cycle of the RF signal voltage.

7. The circuit of claim 6, wherein the SOI MOSFET comprises an N MOSFET.

8. The circuit of claim 6, wherein the SOI MOSFET comprises a P MOSFET.

9. The circuit of claim 6, wherein the SOI MOSFET comprises an SOI MOSFET selected from the following types:

a silicon-on-sapphire (SOS) SOI MOSFET, a silicon-germanium (SiGe) SOI MOSFET, a Separation by Implantation of Oxygen (SIMOX) SOI MOSFET, and a silicon bonded to insulator SOI MOSFET.

10. The circuit of claim 6, wherein the circuit comprises a circuit selected from the following types:

an RF switching circuit, an RF mixer, a power amplifier, a level shifting circuit, a negative voltage generator, an oscillator, and a DC-DC converter.

11. A method for controlling accumulated charge in a circuit comprising a semiconductor-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOSFET) operating in an accumulated charge regime, comprising the steps of:

a) operatively coupling a control circuit to a gate of the SOI MOSFET; and

b) applying a voltage pulse to the gate;

wherein the voltage pulse switches the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for a selected interval.

12. The method of claim 11, wherein the SOI MOSFET comprises an N MOSFET.

13. The method of claim 11, wherein the SOI MOSFET comprises a P MOSFET.

14. The method of claim 11, wherein the SOI MOSFET comprises an SOI MOSFET selected from the following types:

a silicon-on-sapphire (SOS) SOI MOSFET, a silicon-germanium (SiGe) SOI MOSFET, a Separation by Implantation of Oxygen (SIMOX) SOI MOSFET, and a silicon bonded to insulator SOI MOSFET.

15. The method of claim 11, wherein the circuit comprises a circuit selected from the following types:

an RF switching circuit, an RF mixer, a power amplifier, a level shifting circuit, a negative voltage generator, an oscillator, and a DC-DC converter.

16. A method for controlling accumulated charge in a circuit comprising a semiconductor-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOSFET) operating in an accumulated charge regime, comprising the steps of:

a) operatively coupling a resistor to a gate of the SOI MOSFET sufficient to prevent attenuation of an induced RF voltage on the gate; and

b) applying an RF signal having a selected frequency to a drain of the SOI MOSFET thereby generating the induced RF voltage, wherein the induced RF voltage transitions the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for part of a cycle of the RF signal voltage.

17. The method of claim 16, wherein the SOI MOSFET comprises an N MOSFET.

18. The method of claim 16, wherein the SOI MOSFET comprises a P MOSFET.

19. The method of claim 16, wherein the SOI MOSFET comprises an SOI MOSFET selected from the following types:

a silicon-on-sapphire (SOS) SOI MOSFET, a silicon-germanium (SiGe) SOI MOSFET, a Separation by Implantation of Oxygen (SIMOX) SOI MOSFET, and a silicon bonded to insulator SOI MOSFET.

20. The method of claim 16, wherein the circuit comprises a circuit selected from the following types:

an RF switching circuit, an RF mixer, a power amplifier, a level shifting circuit, a negative voltage generator, an oscillator, and a DC-DC converter.

21. A system for controlling accumulated charge in a circuit comprising a semiconductor-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOSFET) operating in an accumulated charge regime, comprising:

a) means for operatively coupling a control circuit to a gate of the SOI MOSFET; and

b) means for applying a voltage pulse to the gate that switches the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for a selected interval.