Buffer management method and apparatus for power reduction during flash operation

• US 20110239043A1
• Filed: 01/24/2011
• Published: 09/29/2011
• Est. Priority Date: 03/29/2010
• Status: Active Grant

• Current Assignee: Dot Hill Systems Corporation (Seagate Technology Holdings Plc)
• Original Assignee: Dot Hill Systems Corporation (Seagate Technology Holdings Plc)
• Inventors: Peters, Michael Joseph, Vedder, Rex Weldon, Golson, Bradford Edwin
• Granted Patent: US 8,510,598 B2
• Time in Patent Office: Days
• US Class Current: 714/14
• CPC Class Codes: G06F 1/263 Arrangements for using multiple switchable power supplies, e.g. battery and AC G06F1/30 takes precedence
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G11C 5/141 Battery and back-up supplies
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A method for providing reduced power consumption in a computer memory system is provided. The method includes transferring, by a memory controller coupled to a volatile memory, a non-volatile memory, and a buffer, first data from the volatile memory to the buffer. The buffer stores less data than the volatile memory and the non-volatile memory. The method also includes placing the volatile memory into self-refresh mode after transferring the first data to the buffer. The method further includes conveying the first data from the buffer to the non-volatile memory, where the amount of first data exceeds a predetermined threshold. While conveying the first data, the memory controller takes the volatile memory out of self-refresh mode when the amount of first data in the buffer reaches the predetermined threshold. The volatile memory is ready to transfer second data to the buffer when the memory controller is finished transferring the first data.

Claims

1. A method for providing reduced power consumption in a computer memory system, comprising:

transferring, by a memory controller coupled to a volatile memory, a non-volatile memory, and a buffer, first data from the volatile memory to the buffer, wherein the buffer stores less data than the volatile memory and the non-volatile memory, wherein the memory controller controls data transfers between the volatile memory, the buffer, and the non-volatile memory;

placing, by the memory controller, the volatile memory into self-refresh mode after transferring the first data to the buffer; and

conveying, by the memory controller, the first data from the buffer to the non-volatile memory, wherein the amount of first data in the buffer exceeds a predetermined threshold,

wherein while conveying the first data from the buffer to the non-volatile memory, the memory controller takes the volatile memory out of self-refresh mode when the amount of first data remaining in the buffer reaches the predetermined threshold, wherein the volatile memory is ready to transfer second data to the buffer when the memory controller is finished transferring the first data from the buffer to the non-volatile memory.

2. The method of claim 1, wherein the time to transfer an amount of data in the buffer equal to the predetermined threshold to the non-volatile memory is approximately equal to the time to transition the volatile memory out of self-refresh mode.

3. The method of claim 2, wherein the volatile memory comprises a plurality of volatile memory banks, wherein the first and second data are in a first volatile memory bank of the plurality of volatile memory banks, wherein the second data is the last data in the first volatile memory bank that needs to be flushed to the non-volatile memory, wherein third data that needs to be flushed to the non-volatile memory is in a second volatile memory bank of the plurality of volatile memory banks.

4. The method of claim 3, further comprising:

maintaining, by the memory controller, the plurality of volatile memory banks in self-refresh mode when data is not being accessed or prepared for access in the plurality of volatile memory banks, wherein all banks of the plurality of volatile memory banks except the bank transferring data to the buffer are in self-refresh mode.

5. The method of claim 3, further comprising:

transferring, by the memory controller, the second data from the first volatile memory bank to the buffer after conveying the first data from the buffer to the non-volatile memory.

6. The method of claim 5, wherein if the amount of second data is not greater than the predetermined threshold, after transferring the second data from the first volatile memory bank to the buffer:

placing, by the memory controller, the first volatile memory bank into self-refresh mode;

taking, by the memory controller, the second volatile memory bank out of self-refresh mode; and

conveying, by the memory controller, the second data from the buffer to the non-volatile memory.

7. The method of claim 5, wherein if the amount of second data is greater than the predetermined threshold, after transferring the second data from the first volatile memory bank to the buffer:

placing, by the memory controller, the first volatile memory bank into self-refresh mode; and

conveying, by the memory controller, the second data from the buffer to the non-volatile memory,

wherein while conveying the second data from the buffer to the non-volatile memory, the memory controller takes the second volatile memory bank out of self-refresh mode when the amount of second data remaining in the buffer reaches the predetermined threshold, wherein the volatile memory is ready to transfer third data to the buffer when the memory controller is finished transferring the second data from the buffer to the non-volatile memory.

8. The method of claim 5, wherein if the amount of second data is less than the size of the buffer, after transferring the second data from the first volatile memory bank to the buffer:

placing, by the memory controller, the first volatile memory bank into self-refresh mode;

taking the second volatile memory bank out of self-refresh mode, wherein if third data that needs to be flushed to the non-volatile memory is in the second volatile memory bank;

delaying, by the memory controller, transfer of the second data from the buffer to the non-volatile memory until the memory controller transfers third data from the second volatile memory bank to the buffer and either the buffer is full or there is not more third data available in the second volatile memory bank to transfer to the buffer.

9. The method of claim 3, further comprising:

providing, by a power manager coupled to the computer memory system, main power to the computer memory system when main power is available and backup power to the computer memory system when main power is not available.

10. The method of claim 9, further comprising:

receiving, by the power manager, an indication from the memory controller after the memory controller transfers the second data from the first volatile memory bank to the buffer; and

removing, by the power manager, backup power to the first volatile memory bank, after receiving the indication from the memory controller.

11. A computer memory system that flushes data from a volatile memory to a non-volatile memory when main power is lost to the computer memory system, comprising:

a volatile memory, wherein the volatile memory is in self-refresh mode;

a buffer, comprising first data, wherein the amount of first data in the buffer exceeds a predetermined threshold, wherein the buffer stores less data than the volatile memory and the non-volatile memory;

a non-volatile memory; and

a memory controller, coupled to the volatile memory, the buffer, and the non-volatile memory, wherein the memory controller controls data transfers between the volatile memory, the buffer, and the non-volatile memory, wherein the memory controller transfers the first data from the volatile memory to the buffer prior to placing the volatile memory in self-refresh mode,

wherein during a transfer of first data from the buffer to the non-volatile memory, when the amount of first data remaining in the buffer reaches the predetermined threshold, the memory controller takes the volatile memory out of self-refresh mode, wherein the volatile memory is ready to transfer second data to the buffer when the memory controller is finished transferring the first data from the buffer to the non-volatile memory.

12. The computer memory system of claim 11, wherein the time to transfer an amount of data in the buffer equal to the predetermined threshold to the non-volatile memory is approximately equal to the time to transition the volatile memory out of self-refresh mode.

13. The computer memory system of claim 12, wherein the volatile memory comprises a plurality of volatile memory banks, wherein the first and second data are in a first volatile memory bank of the plurality of volatile memory banks, wherein the second data is the last data in the first volatile memory bank that needs to be flushed to the non-volatile memory, wherein third data that needs to be flushed to the non-volatile memory is in a second volatile memory bank of the plurality of volatile memory banks.

14. The computer memory system of claim 13, wherein the memory controller maintains the plurality of volatile memory banks in self-refresh mode when data is not accessed in the plurality of volatile memory banks, wherein all banks of the plurality of volatile memory banks except the bank transferring data to the buffer are in self-refresh mode.

15. The computer memory system of claim 13, wherein the memory controller transfers the second data from the first volatile memory bank to the buffer after the memory controller transfers the first data from the buffer to the non-volatile memory.

16. The computer memory system of claim 15, wherein if the amount of second data is not greater than the predetermined threshold, the memory controller places the first volatile memory bank into self-refresh mode, takes the second volatile memory bank out of self-refresh mode, and transfers the second data from the buffer to the non-volatile memory.

17. The computer memory system of claim 15, wherein if the amount of second data is greater than the predetermined threshold, the memory controller places the first volatile memory bank into self-refresh mode and transfers the second data from the buffer to the non-volatile memory.

18. The computer memory system of claim 15, wherein if the amount of second data is less than the size of the buffer, the memory controller places the first volatile memory bank into self-refresh mode and takes the second volatile memory bank out of self-refresh mode, wherein if third data that needs to be flushed to the non-volatile memory is in the second volatile memory bank, the memory controller delays transferring the second data from the buffer to the non-volatile memory until the memory controller transfers third data from the second volatile memory bank to the buffer and either the buffer is full or there is not more third data available in the second volatile memory bank to transfer to the buffer.

19. The computer memory system of claim 13, further comprising:

a power manager, coupled to the computer memory system, wherein the power manager provides main power to the computer memory system when main power is available, wherein the power manager provides backup power to the computer memory system when main power is not available.

20. The computer memory system of claim 19, wherein after transferring the second data from the first volatile memory bank to the buffer, the memory controller provides an indication to the power manager, wherein in response to receiving the indication from the memory controller, the power manager foregoes providing backup power to the first volatile memory bank.