METHODS FOR FORMING ANTI-REFLECTION STRUCTURES FOR CMOS IMAGE SENSORS

• US 20110250715A1
• Filed: 06/21/2011
• Published: 10/13/2011
• Est. Priority Date: 05/14/2008
• Status: Active Grant

• Current Assignee: Smartsens Technology (Cayman) Co., Ltd.
• Original Assignee: International Business Machines Corporation
• Inventors: Gambino, Jeffrey P., Ellis-Monaghan, John J., Adkisson, James W., Musante, Charles F.
• Granted Patent: US 8,409,904 B2
• Time in Patent Office: Days
• US Class Current: 438/57
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14625 Optical elements or arrangements associated with the device
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14685 Process for coatings or optical elements
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

Protuberances, having vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode, are formed at an optical interface between two layers having different refractive indices. The protuberances may be formed by employing self-assembling block copolymers that form an array of sublithographic features of a first polymeric block component within a matrix of a second polymeric block component. The pattern of the polymeric block component is transferred into a first optical layer to form an array of nanoscale protuberances. Alternately, conventional lithography may be employed to form protuberances having dimensions less than the wavelength of light. A second optical layer is formed directly on the protuberances of the first optical layer. The interface between the first and second optical layers has a graded refractive index, and provides high transmission of light with little reflection.

Claims

1. A method of forming a semiconductor structure comprising:

forming a photodiode in a semiconductor layer;

forming a transistor on said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode;

forming an interconnect level dielectric layer embedding a metal line on said semiconductor layer; and

forming a protuberance-containing dielectric portion directly on said interconnect level dielectric layer, wherein said protuberance-containing dielectric portion comprises an array of an array of protuberances.

2. The method of claim 1, further comprising forming a flat dielectric portion having a same composition as said protuberance-containing dielectric portion directly on said interconnect level dielectric layer.

3. The method of claim 2, wherein said flat dielectric portion has a first thickness, and wherein each of said protuberances has a height from a base to an apex, and wherein said protuberance-containing dielectric portion comprises a constant thickness portion abutting each base of said protuberances and having a second thickness, wherein said first thickness is substantially equal to a sum of said second thickness and said height.

4. The method of claim 1, further comprising:

forming a dielectric layer directly on said interconnect level dielectric layer;

applying self-assembling block copolymers directly on said dielectric layer;

annealing said self-assembling block copolymers and inducing formation of cylindrical polymeric blocks and a polymeric block matrix surrounding said cylindrical polymeric blocks;

removing said cylindrical polymeric blocks selective to said polymeric block matrix; and

etching exposed portions of said dielectric layer employing said polymeric block matrix as an etch mask, wherein said array of protuberances is formed by said etching in a portion of said dielectric layer, wherein said portion constitutes said protuberance-containing dielectric portion.

5. The method of claim 4, further comprising:

forming a masking layer over said dielectric layer; and

patterning said masking layer, wherein said masking layer area is removed in a pixel exposing said dielectric layer therebeneath, while maintaining said masking layer in a logic area.

6. The method of claim 4, wherein said self-assembling block copolymers contains a first polymeric block component and a second polymeric block component that are immiscible with each other.

7. The method of claim 4, wherein said self-assembling block copolymers comprises at least one of polystyrene-block-polymethylmethacrylate (PS-b-PMMA), polystyrene-block-polyisoprene (PS-b-PI), polystyrene-block-polybutadiene (PS-b-PBD), polystyrene-block-polyvinylpyridine (PS-b-PVP), polystyrene-block-polyethyleneoxide (PS-b-PEO), polystyrene-block-polyethylene (PS-b-PE), polystyrene-b-polyorganosilicate (PS-b-POS), polystyrene-block-polyferrocenyldimethylsilane (PS-b-PFS), polyethyleneoxide-block-polyisoprene (PEO-b-PI), polyethyleneoxide-block-polybutadiene (PEO-b-PBD), polyethyleneoxide-block-polymethylmethacrylate (PEO-b-PMMA), polyethyleneoxide-block-polyethylethylene (PEO-b-PEE), polybutadiene-block-polyvinylpyridine (PBD-b-PVP), and polyisoprene-block-polymethylmethacrylate (PI-b-PMMA).

8. A method of forming a semiconductor structure comprising:

forming a photodiode in a semiconductor layer;

forming a transistor on said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode; and

forming a dielectric layer over said photodiode, wherein said dielectric layer laterally surrounds and overlies a gate electrode of said transistor and comprises a protuberance-containing dielectric portion which overlies said photodiode and includes an array of protuberances.

9. The method of claim 8, wherein said dielectric layer further comprises a flat dielectric portion located over said gate electrode and a drain region of said transistor and having a same composition as said protuberance-containing dielectric portion.

10. The method of claim 9, wherein said flat dielectric portion has a first thickness, and wherein each of said protuberances has a height from a base to an apex, and wherein said protuberance-containing dielectric portion comprises a constant thickness portion abutting each base of said protuberances and having a second thickness, wherein said first thickness is substantially equal to a sum of said second thickness and said height.

11. The method of claim 8, further comprising:

applying self-assembling block copolymers directly on said dielectric layer;

annealing said self-assembling block copolymers and inducing formation of cylindrical polymeric blocks and a polymeric block matrix surrounding said cylindrical polymeric blocks;

removing said cylindrical polymeric blocks selective to said polymeric block matrix; and

etching exposed portions of said dielectric layer employing said polymeric block matrix as an etch mask, wherein said array of protuberances is formed by said etching in a portion of said dielectric layer, wherein said portion constitutes said protuberance-containing dielectric portion.

12. The method of claim 11, further comprising:

forming a masking layer over said dielectric layer; and

patterning said masking layer, wherein said masking layer area is removed in a pixel exposing said dielectric layer therebeneath, while maintaining said masking layer in a logic area.

13. The method of claim 11, wherein said self-assembling block copolymers contains a first polymeric block component and a second polymeric block component that are immiscible with each other.

14. The method of claim 11, wherein said self-assembling block copolymers comprises at least one of polystyrene-block-polymethylmethacrylate (PS-b-PMMA), polystyrene-block-polyisoprene (PS-b-PI), polystyrene-block-polybutadiene (PS-b-PBD), polystyrene-block-polyvinylpyridine (PS-b-PVP), polystyrene-block-polyethyleneoxide (PS-b-PEO), polystyrene-block-polyethylene (PS-b-PE), polystyrene-b-polyorganosilicate (PS-b-POS), polystyrene-block-polyferrocenyldimethylsilane (PS-b-PFS), polyethyleneoxide-block-polyisoprene (PEO-b-PI), polyethyleneoxide-block-polybutadiene (PEO-b-PBD), polyethyleneoxide-block-polymethylmethacrylate (PEO-b-PMMA), polyethyleneoxide-block-polyethylethylene (PEO-b-PEE), polybutadiene-block-polyvinylpyridine (PBD-b-PVP), and polyisoprene-block-polymethylmethacrylate (PI-b-PMMA).

15. A method of forming a semiconductor structure comprising:

forming a photodiode in a semiconductor layer;

forming a dielectric material layer containing a lens over said photodiode in an optical path of said photodiode; and

forming a protuberance-containing dielectric portion directly on said dielectric material layer, wherein said protuberance-containing dielectric portion comprises an array of protuberances.

16. The method of claim 15, further comprising forming a flat dielectric portion having a same composition as, and being of integral construction as, said protuberance-containing dielectric portion directly on said dielectric material layer.

17. The method of claim 16, wherein said flat dielectric portion has a first thickness, and wherein each of said protuberances has a height from a base to an apex, and wherein said protuberance-containing dielectric portion comprises a constant thickness portion abutting each base of said protuberances and having a second thickness, wherein said first thickness is substantially equal to a sum of said second thickness and said height.

18. The method of claim 15, further comprising:

forming a dielectric layer directly on said dielectric material layer;

applying self-assembling block copolymers directly on said dielectric layer;

annealing said self-assembling block copolymers and inducing formation of cylindrical polymeric blocks and a polymeric block matrix surrounding said cylindrical polymeric blocks;

removing said cylindrical polymeric blocks selective to said polymeric block matrix; and

etching exposed portions of said dielectric layer employing said polymeric block matrix as an etch mask, wherein said array of protuberances is formed by said etching in a portion of said dielectric layer, wherein said portion constitutes said protuberance-containing dielectric portion.

19. The method of claim 18, further comprising:

forming a masking layer over said dielectric layer; and

patterning said masking layer, wherein said masking layer area is removed in a pixel exposing said dielectric layer therebeneath, while maintaining said masking layer in a logic area.

20. The method of claim 18, wherein said self-assembling block copolymers contains a first polymeric block component and a second polymeric block component that are immiscible with each other.

21. The method of claim 18, wherein said self-assembling block copolymers comprises at least one of polystyrene-block-polymethylmethacrylate (PS-b-PMMA), polystyrene-block-polyisoprene (PS-b-PI), polystyrene-block-polybutadiene (PS-b-PBD), polystyrene-block-polyvinylpyridine (PS-b-PVP), polystyrene-block-polyethyleneoxide (PS-b-PEO), polystyrene-block-polyethylene (PS-b-PE), polystyrene-b-polyorganosilicate (PS-b-POS), polystyrene-block-polyferrocenyldimethylsilane (PS-b-PFS), polyethyleneoxide-block-polyisoprene (PEO-b-PI), polyethyleneoxide-block-polybutadiene (PEO-b-PBD), polyethyleneoxide-block-polymethylmethacrylate (PEO-b-PMMA), polyethyleneoxide-block-polyethylethylene (PEO-b-PEE), polybutadiene-block-polyvinylpyridine (PBD-b-PVP), and polyisoprene-block-polymethylmethacrylate (PI-b-PMMA).

22. A method of forming a semiconductor structure comprising:

forming a semiconductor chip; and

encapsulating said semiconductor chip with a package housing, wherein said package housing includes an optically transparent window, said window comprising a first array of protuberances on a front surface and a second set of protuberances on a back surface.

23. The method of claim 22, further comprising:

forming package pins that protrude from a bottom surface of said package housing; and

connecting wirebond pads on said semiconductor chip and package side bond pads connected to said package pins with bonding wires.

24. The method of claim 22, wherein each of said first and second arrays of protuberances has a shape of a cone having a monotonically decreasing cross-sectional area as a function of a vertical distance from a base of said cone, and wherein a height of said cone is from about 40 nm to about 480 nm.

25. The method of claim 22, further comprising:

applying self-assembling block copolymers on an optically transparent layer;

annealing said self-assembling block copolymers and inducing formation of cylindrical polymeric blocks and a polymeric block matrix surrounding said cylindrical polymeric blocks;

removing said cylindrical polymeric blocks selective to said polymeric block matrix;

etching exposed portions of optically transparent layer employing said polymeric block matrix as an etch mask, wherein one of said first array of protuberances and said second array of protuberances is formed by said etching in said optically transparent layer; and

mounting said optically transparent layer on said package housing, wherein said optically transparent layer constitutes said optically transparent window.

26. The method of claim 25, wherein said self-assembling block copolymers contains a first polymeric block component and a second polymeric block component that are immiscible with each other.

27. The method of claim 25, wherein said self-assembling block copolymers comprises at least one of polystyrene-block-polymethylmethacrylate (PS-b-PMMA), polystyrene-block-polyisoprene (PS-b-PI), polystyrene-block-polybutadiene (PS-b-PB D), polystyrene-block-polyvinylpyridine (PS-b-PVP), polystyrene-block-polyethyleneoxide (PS-b-PEO), polystyrene-block-polyethylene (PS-b-PE), polystyrene-b-polyorganosilicate (PS-b-POS), polystyrene-block-polyferrocenyldimethylsilane (PS-b-PFS), polyethyleneoxide-block-polyisoprene (PEO-b-PI), polyethyleneoxide-block-polybutadiene (PEO-b-PBD), polyethyleneoxide-block-polymethylmethacrylate (PEO-b-PMMA), polyethyleneoxide-block-polyethylethylene (PEO-b-PEE), polybutadiene-block-polyvinylpyridine (PBD-b-PVP), and polyisoprene-block-polymethylmethacrylate (PI-b-PMMA).

28. The method of claim 22, further comprising:

applying a photoresist on an optically transparent layer;

lithographically patterning said photoresist;

transferring a pattern in said photoresist by an etch into said optically transparent layer to form one of said first array of protuberances and said second array of protuberances; and

mounting said optically transparent layer on said package housing, wherein said optically transparent layer constitutes said optically transparent window.