METHODS AND SYSTEM FOR VERIFYING MEMORY DEVICE INTEGRITY

• US 20110276844A1
• Filed: 05/06/2010
• Published: 11/10/2011
• Est. Priority Date: 05/06/2010
• Status: Active Grant

• Current Assignee: UTC Fire & Security Americas Corporation, Inc. (Carrier Global Corporation)
• Original Assignee: UTC Fire & Security Americas Corporation, Inc. (Carrier Global Corporation)
• Inventors: Montgomery, Bruce JR., Dopson, Dave, Potter, Timothy Steven, Becker, Donald
• Granted Patent: US 8,335,951 B2
• Time in Patent Office: Days
• US Class Current: 714/718
• CPC Class Codes: G06F 11/1004 to protect a block of data words, e.g. CRC or checksum G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00
• CPC Class Codes: G11C 2029/0401 in embedded memories
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/08 Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing

Abstract

A method for verifying memory device integrity includes identifying at least one memory block corresponding to at least one memory location within a memory device. The memory block is associated with a prior checksum. It is determined whether the first memory block is designated read-only. A current checksum is calculated based at least in part on data within the memory block. When the first memory block is designated read-only, and the prior checksum represents expected data within the first memory block, it is determined whether the current checksum is equal to the prior checksum. When the current checksum is not equal to the prior checksum, a verification failure for the first memory block is indicated via a notification interface. A system for verifying memory device integrity is also disclosed.

Claims

1. A method for verifying an integrity of a memory device, the method comprising:

identifying, by a processor coupled to the memory device, at least one memory block corresponding to at least one memory location within the memory device, the at least one memory block including a first memory block associated with a prior checksum;

determining, by the processor, whether the first memory block is designated read-only;

calculating, by the processor, a current checksum based at least in part on data within the first memory block;

when the first memory block is designated read-only and the prior checksum represents expected data within the first memory block, determining whether the current checksum is equal to the prior checksum; and

when the current checksum is not equal to the prior checksum, indicating a verification failure for the first memory block via a notification interface.

2. A method in accordance with claim 1, further comprising, when the current checksum is equal to the prior checksum, indicating, via the processor, a verification success for the first memory block.

3. A method in accordance with claim 2, wherein indicating a verification success for the first memory block comprises recording a first time at which the current checksum was determined to be equal to the prior checksum, the method further comprising:

at a second time subsequent to the first time, determining, by the processor, whether the first time is older than a predefined threshold age; and

when the first time is older than the predefined threshold age, determining whether the first memory block is designated read-only and calculating a current checksum.

4. A method in accordance with claim 1, further comprising, for each memory block of the plurality of memory blocks, determining whether the memory block is designated read-only, calculating a current checksum, determining whether the current checksum is equal to the prior checksum, and indicating a verification failure for the memory block.

5. A method in accordance with claim 1, further comprising, when the prior checksum does not represent expected data within the first memory block, defining the current checksum as the prior checksum of the first memory block.

6. A method in accordance with claim 1, further comprising, before determining whether the first memory block is designated read-only, disabling interrupt signals within the processor.

7. A method in accordance with claim 6, further comprising, after determining whether the current checksum is equal to the prior checksum, enabling interrupt signals in the processor.

8. A method in accordance with claim 1, further comprising:

registering, by the processor, for notification of an interrupt signal within the processor; and

when a notification of an interrupt signal is received after determining whether the first memory block is designated read-only, aborting one or more of the following;

calculating the current checksum and determining whether the current checksum is equal to the prior checksum.

9. A method in accordance with claim 1, wherein indicating a verification failure via the notification interface comprises one or more of the following:

presenting a visible alarm via a presentation interface, presenting an audible alarm via a presentation interface, and transmitting a verification failure message via a communication interface.

10. A method in accordance with claim 1, further comprising determining whether the prior checksum represents expected data within the first memory block by determining whether the first memory block is allocated to operating system kernel text.

11. A method in accordance with claim 1, wherein identifying at least one memory block comprises identifying a plurality of memory blocks representing the contents of a single file.

12. A system for verifying an integrity of a memory device, the system comprising:

a memory device comprising a plurality of memory locations;

a processor coupled to the memory device and, for each memory block of a plurality of memory blocks corresponding to one or more memory locations of the plurality of memory locations, the processor programmed to;

determine whether the memory block is designated read-only;

calculate a current checksum representing data within the memory block, the memory block associated with a prior checksum representing data within the memory block at a previous time; and

when the memory block is designated read-only and the prior checksum represents expected data within the memory block, determine whether the current checksum is equal to the prior checksum; and

a notification interface coupled to the processor, and, when the current checksum for a first memory block of the plurality of memory blocks is not equal to the prior checksum for the first memory block, the notification interface configured to indicate a verification failure.

13. A system in accordance with claim 12, wherein the processor is further programmed to identify the plurality of memory blocks by identifying a plurality of memory blocks corresponding to all memory locations within the memory device.

14. A system in accordance with claim 12, wherein the processor is further programmed to identify the plurality of memory blocks by identifying a plurality of memory blocks corresponding to a single file.

15. A system in accordance with claim 12, wherein the processor is further programmed to repeatedly perform, for each memory block of the plurality of memory blocks, the steps of determining whether the memory block is designated read-only, calculating a current checksum, and determining whether the current checksum is equal to the prior checksum.

16. A system in accordance with claim 12, wherein, when the prior checksum associated with a memory block does not represent expected data within the memory block, the processor is further programmed to define the current checksum as the prior checksum for the memory block.

17. A system in accordance with claim 12, wherein, for each memory block of the plurality of memory blocks, the processor is further programmed to:

disable interrupt signals within the processor before determining whether the memory block is read-only; and

enable interrupt signals within the processor after determining whether the current checksum is equal to the prior checksum.

18. A system in accordance with claim 12, wherein, for each memory block, the processor is further programmed to associate the memory block with a verification success time at which the current checksum was determined to be equal to the prior checksum when the current checksum is equal to the prior checksum.

19. A system in accordance with claim 18, wherein, for each memory block, the processor is further programmed to perform, based on determining that the memory block is associated with a verification success time older than a predefined threshold age, the steps of determining whether the memory block is read-only, calculating a current checksum, and determining whether the current checksum is equal to the prior checksum.

20. One or more computer-readable storage media having computer-executable components for verifying an integrity of a memory device using at least one processor coupled to the memory device, the components comprising:

a control component that when executed by the at least one processor causes the at least one processor to;

identify a memory block corresponding to at least one memory location within the memory device and associated with a prior checksum;

a verification component that when executed by the at least one processor causes the at least one processor to;

calculate a current checksum based at least in part on data within the identified memory block; and

when the identified memory block is designated read-only and the prior checksum represents expected data within the identified memory block, determine whether the current checksum is equal to the prior checksum; and

a notification component that when executed by the at least one processor causes the at least one processor to;

indicate a verification failure for the identified memory block via a notification interface when the current checksum is not equal to the prior checksum.