Radio Transceiver on a Chip
First Claim
Patent Images
1. A radio receiver integrated on a single integrated circuit chip comprising:
- a heterodyne image-rejection downconversion section configured to down convert, in a single frequency conversion step, a received high frequency signal to a low intermediate frequency signal;
a bandpass channel-selection filter connected to the heterodyne image-rejection downconversion section and configured to perform channel-selection filtering on the low intermediate frequency signal, thereby generating a channel-filtered low intermediate frequency signal; and
a detector connected to the bandpass channel-selection filter and configured to detect a received signal from said channel-filtered low intermediate frequency signal;
wherein the heterodyne image-rejection downconversion section, the bandpass channel-selection filter, and the detector are integrated into said single integrated circuit chip.
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Abstract
An entire radio transceiver can be completely integrated into one IC chip. In order to integrate the IF filters on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme is used to provide a number of other implementation advantages.
1 Citation
6 Claims
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1. A radio receiver integrated on a single integrated circuit chip comprising:
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a heterodyne image-rejection downconversion section configured to down convert, in a single frequency conversion step, a received high frequency signal to a low intermediate frequency signal; a bandpass channel-selection filter connected to the heterodyne image-rejection downconversion section and configured to perform channel-selection filtering on the low intermediate frequency signal, thereby generating a channel-filtered low intermediate frequency signal; and a detector connected to the bandpass channel-selection filter and configured to detect a received signal from said channel-filtered low intermediate frequency signal; wherein the heterodyne image-rejection downconversion section, the bandpass channel-selection filter, and the detector are integrated into said single integrated circuit chip. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification