SEMICONDUCTOR STORAGE DEVICE AND DATA CONTROL METHOD THEREOF

• US 20120072641A1
• Filed: 09/21/2010
• Published: 03/22/2012
• Est. Priority Date: 09/21/2010
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Kawamura, Atsushi, Ogawa, Junji, Suzuki, Akifumi
• Granted Patent: US 9,063,663 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/401 Compressed data
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 3/0608 Saving storage space on storage systems
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

The flash memory controller compresses data in response to a write request. On condition that there is a compression effect with respect to the compressed data, the flash memory controller writes the compressed data to the base area of a physical block of a flash memory. As physical pages assigned to the physical block, the flash memory controller reduces the physical pages assigned to the base area from 102 down to 59, and increases the physical pages assigned to the update area from 26 up to 69. Therefore, it is possible to suppress exhaustion of physical pages which are assigned to the update area, to reduce the number of erases of the physical block, and to consequently prolong device operating life.

Claims

1. A semiconductor storage device, comprising:

a plurality of flash memories which include a plurality of blocks of a physical block, which is a batch erase unit, as data storage areas; and

a flash memory controller which controls data input and output to and from the plurality of flash memories in response to an access request from an access request source,

wherein each of the physical blocks in each of the flash memories include a plurality of physical pages which are minimum write units, and

wherein the flash memory controller;

if the access request is a write request, selects a physical block belonging to any of the flash memories based on the write request,

compresses write data which is added to the write request, and,

on condition that there is a greater reduction in the physical pages required for storing the write data added to the write request when the compressed write data is stored in the selected physical block than when the write data is stored in the selected physical block as is, writes the compressed write data to any of the physical pages of the selected physical block.

2. The semiconductor storage device according to claim 1,

wherein each of the physical blocks is divided into a base area which is a storage destination of new write data among the write data added to the access request, and into an update area which is an update data storage destination, and a plurality of physical pages are respectively assigned to the base area and the update area,

wherein the flash memory controller:

manages a logical address space which is an access target of the access request source by dividing the logical address space into a plurality of logical groups,

also manages each of the logical groups in association with the base area of each of the physical blocks, and

if any of the logical groups is designated by the write request from the access request source,

selects the base area of the physical block which corresponds to the designated logical group,

stores the compressed write data in the selected base area,

forms a virtual base area to which physical pages, for storing the compressed write data as data when the compressed write data is virtually decompressed, are assigned, and

changes the corresponding relationship between the designated logical group and the base area of the physical block corresponding to the logical group into a corresponding relationship between the designated logical group and the virtual base area, and,

processes a physical page which is assigned to the virtual base area as an access destination if a logical group, which is the same as the designated logical group, is designated by a subsequent access request.

3. The semiconductor storage device according to claim 1,

wherein each of the physical blocks is divided into a base area which is a storage destination of new write data among write data applied to the access request and an update area which is a storage destination of update data, and a plurality of physical pages are respectively assigned to the base area and the update area, and

wherein the flash memory controller,

on condition that, as a result of the write data compression, the physical pages serving as write targets among the physical pages which belong to the selected physical block are reduced,

reduces the number of physical pages assigned to the base area belonging to the selected physical block, and

increases the number of physical pages assigned to the update area belonging to the selected physical block.

4. The semiconductor storage device according to claim 1,

wherein each of the physical blocks is divided into a base area which is a storage destination of new write data among write data applied to the access request and an update area which is a storage destination of update data, and a plurality of physical pages are respectively assigned to the base area and the update area,

wherein the flash memory controller:

compares, among the write data, the data size of the write data before the compression with the data size of the write data after the compression, and

writes the write data after the compression to the base area if the data size of the write data after the compression is smaller than the data size of the write data before the compression by at least size of the physical page and,

writes the write data before the compression to the base area if the data size of the write data after the compression is not smaller than the data size of the write data before the compression by at least site of the physical page.

5. The semiconductor storage device according to claim 1,

wherein each of the physical blocks is divided into a base area which is a storage destination of new write data among write data applied to the access request and into an update area which is a storage destination of update data, and a plurality of physical pages are respectively assigned to the base area and the update area,

wherein the flash memory controller:

if the data stored on the physical page of the base area belonging to any of the physical blocks is updated in response to the write request as update source data,

creates update data from the update source data and the write data applied to the write request,

writes the created update data to the update area which belongs to the same physical block as the update source data, and creates update area management information which associates an update source address indicating an access destination of the update source data with an update area address indicating a write destination of the update data, and

if the access request is a read request and the update source data is designated in response to the read request,

the flash memory controller searches for the update area management information, acquires the update area address, and reads the update data from the update area according to the acquired update area address.

6. The semiconductor storage device according to claim 1,

wherein each of the physical blocks is divided into a base area which is a storage destination of new write data among write data applied to the access request and an update area which is a storage destination of update data, and a plurality of physical pages are respectively assigned to the base area and the update area,

wherein the flash memory controller:

if unwritten physical pages of the update area belonging to any of the physical blocks are exhausted,

manages the physical block as a reclamation target physical block, and

reads data of the base area belonging to the reclamation target physical block and update data of the update area belonging to the reclamation target physical block respectively on a data buffer and,

if the read frequency of data read on the data buffer is smaller than a designated value, assuming said condition is fulfilled,

compresses the data read on the data buffer, erases data in the reclamation target physical block from which data was read onto the data buffer, and writes the data compressed on the data buffer to the reclamation target physical block from which the data was erased or to the base area of another physical block which differs from the reclamation target physical block.

7. The semiconductor storage device according to claim 1,

wherein each of the physical blocks is divided into a base area which is a storage destination of new write data among write data applied to the access request and an update area which is a storage destination of update data, and a plurality of physical pages are respectively assigned to the base area and the update area,

wherein the flash memory controller:

if all the data stored in any of the physical blocks has not been an access target for a definite period since being stored,

manages, among the physical blocks, a physical block in which data has not been an access target for a definite period since being stored as a refresh target physical block, and reads data in the refresh target physical block on a data buffer and,

if the read frequency of data read on the data buffer is smaller than a designated value, assuming the above condition is fulfilled,

compresses the data read on the data buffer, erases data in the refresh target physical block from which data was read onto the data buffer,

and writes the data compressed on the data buffer to the refresh target physical block from which the data was erased or to the base area of another physical block which differs from the refresh target physical block.

8. The semiconductor storage device according to claim 1,

wherein the flash memory controller:

manages a logical address space which is an access target of the access request source by dividing the logical address space into a plurality of logical pages, also manages each of the logical pages in association with the physical pages which belong to any of the physical blocks, and

if any of the logical pages is designated in response to a write request from the access request source,

selects one, two or more of the physical pages as physical pages which correspond to the designated logical pages, and

if the above condition is fulfilled,

stores the compressed write data on the selected physical pages, forms a virtual physical page for storing the compressed write data as data when the compressed write data is virtually decompressed, and changes the corresponding relationship between the designated logical page and the one, two or more of the physical pages of the physical block corresponding to the logical page into a corresponding relationship between the designated logical page and the virtual physical pages, and,

if a logical page, which is the same as the designated logical page, is designated in response to a subsequent access request,

processes the virtual physical page as an access destination.

9. The semiconductor storage device according to claim 8,

wherein the flash memory controller:

accumulates write data which is added to each of the write requests each time a write request is received from the access request source,

and batch-compresses a plurality of the accumulated write data and,

if the compression effect of the compressed write data is greater than a designated value, assuming said condition is fulfilled,

stores the compressed write data on the selected physical page, and if the compression effect of the compressed write data is smaller than a designated value, assuming said condition is fulfilled,

stores the write data added to each of the write requests on the selected physical page.

10. The semiconductor storage device according to claim 8,

wherein the flash memory controller:

if unwritten physical pages belonging to any of the physical blocks are exhausted,

manages the physical block as a reclamation target physical block,

reads data in the reclamation target physical block onto a data buffer,

determines a read frequency level of data read on the data buffer,

batch-compresses data with a low read frequency among the data read on the data buffer on the basis of the determination result,

erases data in the reclamation target physical block from which data was read onto the data buffer, and

writes the data compressed on the data buffer to the reclamation target physical block from which the data was erased or to the physical pages of another physical block which differs from the reclamation target physical block, and,

if all the data stored on a physical page which belongs to any of the physical blocks has not been an access target for a definite period since being stored,

manages the physical block as a refresh target physical block,

reads data in the refresh target physical block onto the data buffer,

determines a read frequency level of data read on the data buffer,

batch-compresses data with a low read frequency among the data read on the data buffer on the basis of the determination result,

erases data in the refresh target physical block from which data was read onto the data buffer, and

writes the data compressed on the data buffer to the refresh target physical block from which the data was erased or to the physical pages of another physical block which differs from the reclamation target physical block.

11. A data control method for a semiconductor storage device that comprises:

a plurality of flash memories which include a plurality of blocks of a physical block which is a batch erase unit, as data storage areas; and

a flash memory controller which controls data input and output to and from the plurality of flash memories in response to an access request from an access request source,

wherein each of the physical blocks of each of the flash memories includes a plurality of physical pages which are minimum write units,

wherein each of the physical blocks is divided into a base area which is a storage destination of new write data among write data applied to the access request and into an update area which is a storage destination of update data, and a plurality of physical pages are respectively assigned to the base area and the update area,

wherein the flash memory controller;

if the access request is a write request, selects a physical block belonging to any of the flash memories based on the write request,

compresses write data which is added to the write request, and

on condition that there is a greater reduction in the physical pages required for storing the write data added to the write request when the compressed write data is stored in the selected physical block than when the write data is stored in the selected physical block as is,

writes the compressed write data to any of the physical pages of the selected physical block.

12. The data control method for a semiconductor storage device according to claim 11,

wherein the flash memory controller:

manages a logical address space which is an access target of the access request source by dividing the logical address space into a plurality of logical groups,

also manages each of the logical groups in association with the base area of each of the physical blocks, and

if any of the logical groups is designated by the write request from the access request source,

selects the base area of the physical block which corresponds to the designated logical group,

stores the compressed write data in the selected base area,

forms a virtual base area to which physical pages, for storing the compressed write data as data when the compressed write data is virtually decompressed, are assigned, and

changes the corresponding relationship between the designated logical group and the base area of the physical block corresponding to the logical group into a corresponding relationship between the designated logical group and the virtual base area, and

if a logical group which is the same as the designated logical group is designated by a subsequent access request,

processes a physical page which is assigned to the virtual base area as an access destination.

13. The data control method for a semiconductor storage device according to claim 11,

wherein the flash memory controller,

on condition that, as a result of the write data compression, the physical pages serving as write targets among the physical pages which belong to the selected physical block are reduced,

reduces the number of physical pages assigned to the base area belonging to the selected physical block, and

increases the number of physical pages assigned to the update area belonging to the selected physical block.

14. The data control method for a semiconductor storage device according to claim 11,

wherein the flash memory controller,

compares, among the write data, the data size of the write data before the compression with the data size of the write data after the compression and,

if the data size of the write data after the compression is smaller than the data size of the write data before the compression by at least size of the physical page,

writes the write data after the compression to the base area and,

if the data size of the write data after the compression is not smaller than the data size of the write data before the compression by at least size of the physical page,

writes the write data before the compression to the base area.

15. The data control method for a semiconductor storage device according to claim 11,

wherein the flash memory controller:

if the data stored on the physical page of the base area belonging to any of the physical blocks is updated by the write request as update source data,

creates update data from the update source data, and the write data applied to the write request,

writes the created update data to the update area which belongs to the same physical block as the update source data, and

creates update area management information which associates an update source address indicating an access destination of the update source data with an update area address indicating a write destination of the update data, and

if the access request is a read request and the update source data is designated in response to the read request,

the flash memory controller;

searches for the update area management information,

acquires the update area address, and

reads the update data from the update area according to the acquired update area address.