SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE

• US 20120074490A1
• Filed: 09/06/2011
• Published: 03/29/2012
• Est. Priority Date: 09/24/2010
• Status: Active Grant

• Current Assignee: Ablic Inc. (MinebeaMitsumi Inc.)
• Original Assignee: Seiko Instruments Incorporated (Seiko Group)
• Inventors: Saitoh, Naoto
• Granted Patent: US 8,450,797 B2
• Time in Patent Office: Days
• US Class Current: 257/332
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

To realize forming a trench MOSFET in which a depth of a P-body is changed on the same surface as a CMOS by employing steps with good controllability and without greatly increasing the number of manufacturing steps, provided is a trench MOSFET including an extended body region (10), which is a part of a P-body region (4) and is provided in a vicinity of a deep trench (5) with a distance, the extended body region (10) being diffused deeper than the P-body region (4).

Claims

1. A method of manufacturing a semiconductor device, comprising:

forming a buried layer of a second conductivity type, which becomes a heavily doped drain, on a semiconductor substrate of a first conductivity type;

forming an epitaxial layer of the second conductivity type, which becomes a lightly doped drain, on the buried layer;

forming a first diffusion layer region of the first conductivity type, which becomes a body region, in the epitaxial layer;

forming a deep trench region extending from the first diffusion layer region to inside of the epitaxial layer;

forming a gate insulating film in an inner wall of the deep trench region;

filling the deep trench region with a polysilicon to form a gate electrode, which is held in contact with the gate insulating film;

forming a source region of the second conductivity type in a surface of the first diffusion layer region;

performing ion implantation of impurities from the surface of the first diffusion layer region, at a position distanced from the deep trench region and in a region to be formed as a bottom portion of the first diffusion layer region, to thereby form a second diffusion layer region of the first conductivity type, which becomes an extended body region which extends toward the epitaxial layer, the second diffusion layer region being continuous with the first diffusion layer region; and

forming a heavily doped diffusion layer of the first conductivity type, which becomes a body contact region, in the surface of the first diffusion layer region.

2. A method of manufacturing a semiconductor device according to claim 1, wherein:

the forming of the first diffusion layer region comprises performing ion implantation with an acceleration energy in a range of 50 keV to 250 keV; and

the forming of the second diffusion layer region comprises performing ion implantation with an acceleration energy in a range of 100 keV to 1,000 keV, the acceleration energy being higher than the acceleration energy of the ion implantation during the forming of the first diffusion layer region.

3. A method of manufacturing a semiconductor device according to claim 1, wherein the forming of the second diffusion layer region is carried out using a mask pattern that is the same as a mask pattern used during the forming of the heavily doped diffusion layer of the first conductivity type, which becomes the body contact region.

4. A method of manufacturing a semiconductor device, comprising:

forming a buried layer of a second conductivity type, which becomes a heavily doped drain, on a semiconductor substrate of a first conductivity type;

forming an epitaxial layer of the second conductivity type, which becomes a lightly doped drain, on the buried layer;

forming a shallow trench region in a surface of the epitaxial layer, at a position distanced from a deep trench region to be formed afterwards;

performing ion implantation from the surface of the epitaxial layer via the shallow trench region, to thereby form a diffusion layer region of the first conductivity type, which becomes a body region, the diffusion layer region having an impurity distribution shape reflecting a shape of the surface of the epitaxial layer;

forming the deep trench region extending from the diffusion layer region to inside of the epitaxial layer;

forming a gate insulating film in an inner wall of the deep trench region;

filling polysilicon into the deep trench region to form a gate electrode, which is held in contact with the gate insulating film;

forming a source region of the second conductivity type in a surface of the diffusion layer region; and

forming a heavily doped diffusion layer of the first conductivity type, which becomes a body contact region, in the surface of the diffusion layer region.

5. A method of manufacturing a semiconductor device according to claim 4, wherein a depth of the shallow trench region is set in a range of 200 nm to 600 nm.

6. A semiconductor device, comprising:

a semiconductor substrate of a first conductivity type;

a buried layer of a second conductivity type, which becomes a heavily doped drain and is formed on the semiconductor substrate;

an epitaxial layer of the second conductivity type, which becomes a lightly doped drain and is formed on the buried layer;

a first diffusion layer region of the first conductivity type, which becomes a body region and is formed in the epitaxial layer of the second conductivity type;

a deep trench region formed so as to be extended from the first diffusion layer region to inside of the epitaxial layer;

a gate insulating film formed in an inner wall of the deep trench region;

a gate electrode, which is made of polysilicon filled in the deep trench region and is held in contact with the gate insulating film;

a source region of the second conductivity type, which is formed in a surface of the first diffusion layer region; and

a heavily doped diffusion layer of the first conductivity type, which becomes a body contact region and is formed in the surface of the first diffusion layer region, wherein the first diffusion layer region is shaped so as to include a second diffusion layer region at a bottom portion thereof and at a position distanced from the deep trench region, the second diffusion layer region extending toward the epitaxial layer.

7. A semiconductor device according to claim 6, wherein the second diffusion layer region is positioned below the body contact region.

8. A semiconductor device according to claim 6, further comprising a shallow trench region formed in a surface of the epitaxial layer, wherein the second diffusion layer region is positioned below the shallow trench region.