Storing Corresponding Data Units in a Common Storage Unit

• US 20120102297A1
• Filed: 02/15/2011
• Published: 04/26/2012
• Est. Priority Date: 10/25/2010
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Haines, Jonathan Williams, Feldman, Timothy R.
• Granted Patent: US 9,569,351 B2
• Time in Patent Office: Days
• US Class Current: 711/209
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0643 Management of files
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A storage device controller may segregate data units that are typically accessed together to a common storage unit. In one example, a storage device includes a control unit configured to receive a plurality of logical blocks to be stored in the storage device, wherein a first set of addresses comprises logical block addresses (LBAs) of the plurality of logical blocks, and a non-volatile memory configured to store logical blocks in a plurality of storage units, wherein one of the plurality of storage units includes logical blocks corresponding to a second set of addresses. The control unit may determine an intersection of the first set of addresses with the second set of addresses and to store each of the logical blocks having LBAs in the determined intersection of addresses in a common storage unit of the storage device, wherein the common storage unit comprises one of the plurality of storage units.

Claims

1. A method comprising:

receiving, by a storage device, a plurality of logical blocks to be stored in the storage device, wherein a first set of addresses comprises logical block addresses (LBAs) of the plurality of logical blocks;

determining an intersection of the first set of addresses with a second set of addresses, wherein the second set of addresses comprises LBAs of logical blocks in a storage unit of the storage device; and

storing each of the logical blocks having LBAs in the determined intersection of addresses in a common storage unit of the storage device.

2. The method of claim 1, further comprising storing the logical blocks having LBAs outside of the determined intersection in one or more storage units other than the common storage unit of the storage device.

3. The method of claim 1, further comprising:

determining whether the logical blocks having LBAs in the determined intersection fill the common storage unit; and

when the logical blocks do not fill the common storage unit, storing one or more of the received plurality of logical blocks that do not have LBAs in the intersection in the common storage unit.

4. The method of claim 1, wherein storing each of the logical blocks comprises storing each of the logical blocks having addresses in the determined intersection in order of the addresses of the LBAs in the common storage unit.

5. The method of claim 1, wherein storing each of the logical blocks comprises storing each of the logical blocks having addresses in the determined intersection in an order in which the LBAs were received.

6. The method of claim 1, wherein the plurality of logical blocks comprises a first plurality of logical blocks, wherein the common storage unit comprises a first common storage unit, and wherein the determined intersection comprises a first determined intersection, the method further comprising:

receiving a second plurality of logical blocks to be stored in the storage device, wherein a third set of addresses comprises LBAs of the second plurality of logical blocks;

determining a second intersection of the third set of addresses with the first determined intersection; and

storing each of the logical blocks having addresses in the second determined intersection of addresses in a second common storage unit of the storage device.

7. The method of claim 6, further comprising storing the logical blocks having addresses outside of the second determined intersection in one or more storage units other than the common storage unit of the storage device.

8. The method of claim 1, wherein receiving the plurality of logical blocks comprises receiving each of the plurality of logical blocks in close temporal proximity to each of the others of the plurality of logical blocks.

9. The method of claim 1, wherein receiving the plurality of logical blocks comprises receiving each of the plurality of logical blocks in close spatial proximity to each of the others of the plurality of logical blocks.

10. The method of claim 1, wherein the common storage unit is separate from the storage unit in which the logical blocks corresponding to the second set of addresses are stored.

11. A storage device comprising:

a control unit configured to receive a plurality of logical blocks to be stored in the storage device, wherein a first set of addresses comprises logical block addresses (LBAs) of the plurality of logical blocks; and

a non-volatile memory configured to store logical blocks in a plurality of storage units, wherein one of the plurality of storage units includes logical blocks corresponding to a second set of addresses,

wherein the control unit is configured to determine an intersection of the first set of addresses with the second set of addresses and to store each of the logical blocks having LBAs in the determined intersection of addresses in a common storage unit of the storage device, wherein the common storage unit comprises one of the plurality of storage units.

12. The storage device of claim 11, wherein the control unit is configured to determine whether the logical blocks having LBAs in the determined intersection fill the common storage unit and, when the logical blocks do not fill the common storage unit, to store one or more of the received plurality of logical blocks that do not have LBAs in the intersection in the common storage unit.

13. The storage device of claim 11, wherein the control unit is configured to store each of the logical blocks having addresses in the determined intersection in order of the addresses of the logical blocks in the common storage unit.

14. The storage device of claim 11, wherein the control unit is configured to store each of the logical blocks having addresses in the determined intersection in an order in which the logical blocks were received.

15. The storage device of claim 11, wherein the plurality of logical blocks comprises a first plurality of logical blocks, wherein the determined intersection comprises a first determined intersection, wherein the common storage unit comprises a first common storage unit, and wherein the control unit is configured to receive a second plurality of logical blocks to be stored in the storage device, wherein a third set of addresses comprises LBAs of the second plurality of logical blocks, determine a second intersection of the third set of addresses with the first determined intersection, and store each of the LBAs having addresses in the second determined intersection of addresses in a second common storage unit comprising one of the plurality of storage units of the storage device.

16. The storage device of claim 11, wherein the control unit is configured to receive each of the plurality of logical blocks in close temporal proximity to each of the others of the plurality of logical blocks.

17. The storage device of claim 11, wherein the control unit is configured to receive each of the plurality of logical blocks in close spatial proximity to each of the others of the plurality of logical blocks.

18. The storage device of claim 11, wherein the common storage unit is separate from the one of the plurality of storage units including the logical blocks corresponding to the second set of addresses.

19. A system according to claim 11, comprising a computing device coupled to the storage device, the computing device comprising the control unit for controlling the storage device.

20. A computer-readable storage medium encoded with instructions that cause a processor to:

receive a plurality of logical blocks to be stored in a storage device, wherein a first set of addresses comprises logical block addresses (LBAs) of the plurality of logical blocks;

determine an intersection of the first set of addresses with a second set of addresses, wherein the second set of addresses comprises LBAs of logical blocks in a storage unit of the storage device; and

store each of the logical blocks having LBAs in the determined intersection of addresses in a common storage unit of the storage device.

21. The computer-readable storage medium of claim 20, further comprising instructions to:

determine whether the logical blocks having LBAs in the determined intersection fill the common storage unit; and

when the logical blocks do not fill the common storage unit, store one or more of the received plurality of logical blocks that do not have LBAs in the intersection in the common storage unit.

22. The computer-readable storage medium of claim 20, wherein the instructions to store each of the logical blocks comprise instructions to store each of the logical blocks having addresses in the determined intersection in order of the addresses of the LBAs that are to be stored in the common storage unit.

23. The computer-readable storage medium of claim 20, wherein the instructions to store each of the logical blocks comprise instructions to store each of the logical blocks having addresses in the determined intersection in an order in which the LBAs were received.

24. The computer-readable storage medium of claim 20, wherein the plurality of logical blocks comprises a first plurality of logical blocks, wherein the common storage unit comprises a first common storage unit, and wherein the determined intersection comprises a first determined intersection, the computer-readable storage medium further comprising instructions to:

receive a second plurality of logical blocks to be stored in the storage device, wherein a third set of addresses comprises LBAs of the second plurality of logical blocks;

determine a second intersection of the third set of addresses with the first determined intersection; and

store each of the logical blocks having addresses in the second determined intersection of addresses in a second common storage unit of the storage device.

25. The computer-readable storage medium of claim 20, wherein the instructions to receive the plurality of logical blocks comprise instructions to receive each of the plurality of logical blocks in close temporal proximity to each of the others of the plurality of logical blocks.

26. The computer-readable storage medium of claim 20, wherein the instructions to receive the plurality of logical blocks comprise instructions to receive each of the plurality of logical blocks in close spatial proximity to each of the others of the plurality of logical blocks.