SEED LAYERS FOR METALLIC INTERCONNECTS AND PRODUCTS

• US 20120126409A1
• Filed: 01/17/2012
• Published: 05/24/2012
• Est. Priority Date: 10/02/1999
• Status: Active Grant

• Current Assignee: Uri Cohen
• Original Assignee: Seed Layers Technologies LLC (General Patent Corporation)
• Inventors: COHEN, URI
• Granted Patent: US 8,586,471 B2
• Time in Patent Office: Days
• US Class Current: 257/751
• CPC Class Codes: H01L 21/2855 by physical means, e.g. sputtering, evaporation H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 2221/1089 Stacks of seed layers
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 23/53209 based on metals, e.g. alloys, metal silicides H01L23/53285 takes precedence
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53252 Additional layers associated with noble-metal layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method is disclosed for depositing multiple seed layers for metallic interconnects over a substrate, the substrate includes a patterned insulating layer which comprises an opening surrounded by a field, said opening has sidewalls and top corners, and the method including: depositing a continuous seed layer over the sidewalls, using a first set of deposition parameters; and depositing another seed layer over the substrate, including inside the at least one opening and over a portion of said field, using a second set of deposition parameters, wherein: the second set of deposition parameters includes one deposition parameter which is different from any parameters in the first set, or whose value is different in the first and second sets; the continuous seed layer has a thickness in a range from about 20 Å to not more than 250 Å over the field; and the combined seed layers leave sufficient room for electroplating inside the opening.

Claims

1. A method for depositing two or more seed layers for metallic interconnects over a substrate, the substrate includes a patterned insulating layer which comprises at least one opening surrounded by a field, said at least one opening has sidewalls, a bottom, and top corners, and the method comprising:

depositing a continuous seed layer over the sidewalls and the bottom of the at least one opening, using a first set of deposition parameters; and

depositing another seed layer over the substrate, including inside the at least one opening and over at least a portion of said field, using a second set of deposition parameters, wherein;

(i) the second set of deposition parameters includes at least one deposition parameter which is either (a) different from any of the parameters in the first set of deposition parameters, or (b) whose value is different in the first and second sets of deposition parameters;

(ii) said at least one deposition parameter is selected from a group of deposition parameters consisting of substrate bias voltage, duration of deposition, background pressure, precursor gas composition, precursor gas partial pressure, precursor gas flow rate, reacting gas partial pressure, reacting gas flow rate, plasma power density, sputtering gas pressure, sputtering gas flow rate, cathodic voltage, cathodic power, and deposition rate;

(iii) the continuous seed layer has a thickness in a range from about 20 Å

to not more than 250 Å

over the field; and

(iv) the combined seed layers leave sufficient room for electroplating inside the at least one opening.

2. The method of claim 1, wherein at least one of the seed layers comprises a material selected from a group consisting of Cu, Ag, and alloys comprising at least one of these metals.

3. The method of claim 2, wherein the continuous seed layer comprises a continuous CVD seed layer deposited by a CVD technique.

4. The method of claim 2, wherein the continuous seed layer is a continuous CVD seed layer deposited by a CVD technique.

5. The method of claim 4, wherein the thickness of the continuous CVD seed layer over the field is within a range from about 50 Å

to not more than 200 Å

.

6. The method of claim 5, wherein the thickness of the continuous CVD seed layer over the field is within a range from about 50 Å

to not more than 100 Å

.

7. The method of claim 3, wherein the continuous CVD seed layer comprises a continuous ALD seed layer.

8. The method of claim 4, wherein the continuous CVD seed layer is a continuous ALD seed layer.

9. The method of claim 3, wherein said another seed layer comprises a PVD seed layer deposited by a PVD technique.

10. The method of claim 4, wherein said another seed layer is a PVD seed layer deposited by a PVD technique.

11. The method of claim 7, wherein said another seed layer comprises a PVD seed layer.

12. The method of claim 8, wherein said another seed layer is a PVD seed layer.

13. The method of claim 10, wherein:

(i) the thickness of the PVD seed layer is from 100 Å

to 3,000 Å

over the field, (ii) the combined thickness of the seed layers over the field enables uniform electroplating across the substrate, and (iii) said PVD seed layer has no substantial overhangs sealing or pinching-off the top corners of the at least one opening.

14. The method of claim 12, wherein:

(i) the thickness of the PVD seed layer is from 100 Å

to 3,000 Å

over the field, (ii) the combined thickness of the seed layers over the field enables uniform electroplating across the substrate, and (iii) said PVD seed layer has no substantial overhangs sealing or pinching-off the top corners of the at least one opening.

15. The method of claim 13, wherein said continuous CVD seed layer is deposited prior to the deposition of said PVD seed layer.

16. The method of claim 13, wherein said PVD seed layer is deposited prior to the deposition of said continuous CVD seed layer.

17. The method of claim 14, wherein said continuous ALD seed layer is deposited prior to the deposition of said PVD seed layer.

18. The method of claim 14, wherein said PVD seed layer is deposited prior to the deposition of said continuous ALD seed layer.

19. The method of claim 4, wherein the thickness of the continuous CVD seed layer over the field is within a range from about 20 Å

to not more than 150 Å

.

20. The method of claim 4, wherein the thickness of the continuous CVD seed layer over the field is within a range from about 20 Å

to not more than 50 Å

.

21. The method of claim 8, wherein the thickness of the continuous ALD seed layer over the field is within a range from about 20 Å

to not more than 150 Å

.

22. The method of claim 8, wherein the thickness of the continuous ALD seed layer over the field is within a range from about 20 Å

to not more than 50 Å

.

23. The method of claim 2, wherein said continuous seed layer is a continuous PVD seed layer and said another seed layer is another PVD seed layer.

24. The method of claim 23, wherein said at least one deposition parameter is selected from a group of deposition parameters consisting of substrate bias voltage, sputtering gas pressure, cathodic voltage, cathodic power, and plasma power density.

25. The method of claim 24, wherein said at least one deposition parameter is substrate bias voltage.

26. The method of claim 24, wherein said at least one deposition parameter is selected from a group of deposition parameters consisting of sputtering gas pressure and cathodic power.

27. The method of claim 24, wherein said continuous PVD seed layer is deposited prior to the deposition of said another PVD seed layer.

28. The method of claim 24, wherein said another PVD seed layer is deposited prior to the deposition of said continuous PVD seed layer.

29. The method of claim 27, wherein said continuous PVD seed layer and said another PVD seed layer are deposited in the same PVD chamber.

30. The method of claim 27, wherein said continuous PVD seed layer is deposited in one PVD chamber and said another PVD seed layer is deposited in another PVD chamber.

31. The method of claim 22, wherein said continuous PVD seed layer and said another PVD seed layer are deposited in the same PVD chamber.

32. The method of claim 24, wherein said continuous PVD seed layer is deposited in one PVD chamber and said another PVD seed layer is deposited in another PVD chamber.

33. The method of claim 3, wherein said another seed layer is deposited by a conformal deposition technique.

34. The method of claim 33, wherein said continuous CVD seed layer is deposited prior to the deposition of said another seed layer.

35. The method of claim 34, wherein said continuous CVD seed layer is deposited after the deposition of said another seed layer.

36. The method of claim 8, wherein said another seed layer is deposited by a conformal deposition technique.

37. The method of claim 36, wherein said continuous ALD seed layer is deposited prior to the deposition of said another seed layer.

38. The method of claim 36, wherein said continuous ALD seed layer is deposited after the deposition of said another seed layer.

39. A semiconductor device comprising a metallic interconnect produced by the method of claim 10.

40. A semiconductor device comprising a metallic interconnect produced by the method of claim 12.

41. A semiconductor device comprising a metallic interconnect produced by the method of claim 27.

42. A semiconductor device comprising a metallic interconnect produced by the method of claim 28.

43. The method of claim 1, wherein said at least one deposition parameter in said second set of deposition parameters is different from any of the deposition parameters in said first set of deposition parameters.

44. The method of claim 1, wherein said at least one deposition parameter has a value which is different in the first and second sets of deposition parameters.

45. A semiconductor device comprising a metallic interconnect produced by the method of claim 1.

46. The method of claim 1, further comprising depositing one or more barrier layers prior to the deposition of the seed layers.

47. A method for depositing two or more seed layers for metallic interconnects over a substrate, the substrate includes a patterned insulating layer which comprises at least one opening surrounded by a field, said at least one opening has sidewalls, a bottom, and top corners, and the method comprising:

depositing in the same chamber both conformal and non-conformal seed layers utilizing;

(a) two or more distinct steps, wherein the deposition variables (or conditions or parameters) during the first step are suitable for the deposition of a substantially conformal (or a non-conformal) seed layer, and the deposition conditions during the second step are suitable for the deposition of a substantially non-conformal (or a conformal) seed layer, wherein at least one deposition variable has different values during the deposition of the distinct steps;

or (b) wherein at least one of the deposition variables is varied (or ramped) continuously or gradually, thereby changing the nature of the seed layer from substantially conformal to substantially non-conformal, or vice versa;

or (c) a combination of at least one distinct step of depositing a substantially conformal (or a non-conformal) seed layer and at least one gradual variation (or ramping) of at least one deposition variable towards a substantially non-conformal (or a conformal) seed layer, and vice versa;

wherein;

(i) said at least one deposition variable is selected from a group of deposition variables consisting of substrate bias voltage, duration of deposition, background pressure, precursor gas composition, precursor gas partial pressure, precursor gas flow rate, reacting gas partial pressure, reacting gas flow rate, plasma power density, sputtering gas pressure, sputtering gas flow rate, cathodic voltage, cathodic power, and deposition rate;

(ii) said substantially conformal seed layer has a thickness in a range from about 20 Å

to not more than 250 Å

over the field; and

(iii) the combined seed layers leave sufficient room for electroplating inside the at least one opening.

48. The method of claim 47, wherein said at least one deposition variable is selected from a group of deposition variables consisting of substrate bias voltage, sputtering gas pressure, cathodic voltage, cathodic power, and plasma power density.

49. The method of claim 48, wherein said at least one deposition variable is substrate bias voltage.

50. The method of claim 47, wherein said at least one deposition variable is selected from a group of deposition variables consisting of precursor gas composition, precursor gas partial pressure, precursor gas flow rate, reacting gas partial pressure, reacting gas flow rate, and deposition rate.