DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME

• US 20120138938A1
• Filed: 09/23/2011
• Published: 06/07/2012
• Est. Priority Date: 12/02/2010
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Kim, Sanggab, Bae, Yangho, Seo, Osung, Park, Je Hyeong
• Granted Patent: US 9,182,640 B2
• Time in Patent Office: Days
• US Class Current: 257/59
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes

Abstract

A display apparatus includes a first insulating substrate on which pixels are arranged and a second insulating substrate facing the first insulating substrate. Each pixel includes a gate electrode disposed on the first insulating substrate, a gate insulating layer disposed on the first insulating substrate to cover the gate electrode, a semiconductor pattern disposed on the gate insulating layer to overlap with the gate electrode, a source electrode and a drain electrode disposed on the semiconductor pattern, a transparent pixel electrode disposed on the gate insulating layer and partially making contact with the drain electrode, a protective layer disposed on the pixel electrode, and a common electrode disposed on the first insulating substrate or the second insulating substrate to form an electric field together with the pixel electrode.

Claims

1. A display apparatus comprising:

a first insulating substrate;

a second insulating substrate facing the first insulating substrate; and

a plurality of pixels disposed on the first insulating substrate, each pixel comprising;

a gate electrode disposed on the first insulating substrate;

a gate insulating layer disposed on the first insulating substrate to cover the gate electrode;

a semiconductor pattern disposed on the gate insulating layer to overlap with the gate electrode;

a source electrode disposed on the semiconductor pattern;

a drain electrode disposed on the semiconductor pattern to be spaced apart from the source electrode;

a transparent pixel electrode comprising a first pixel electrode disposed on the gate insulating layer and partially making contact with the drain electrode and a second pixel electrode covering the first pixel electrode; and

a common electrode disposed on the first insulating substrate or the second insulating substrate to form an electric field together with the pixel electrode, wherein the first pixel electrode comprises a conductive metal oxide layer containing at least indium and the second pixel electrode comprises a conductive metal oxide layer not containing the indium.

2. The display apparatus of claim 1, wherein the first pixel electrode and the second pixel electrode comprises at least one of tin or zinc.

3. The display apparatus of claim 2, wherein the second pixel electrode comprises a dopant containing at least one of aluminum, germanium, or gallium.

4. The display apparatus of claim 3, wherein the dopant concentration in the second pixel electrode is about 5 weight percent or less of the metal oxide.

5. The display apparatus of claim 1, wherein the first pixel electrode is thinner than the second pixel electrode.

6. The display apparatus of claim 1, wherein each of the source electrode and the drain electrode has a single-layer structure or a multi-layer structure comprising nickel, chromium, molybdenum, aluminum, titanium, copper, tungsten, or an alloy thereof.

7. The display apparatus of claim 6, wherein each of the source electrode and the drain electrode comprises titanium and copper.

8. The display apparatus of claim 1, further comprising a protective layer to cover the pixel electrode, wherein the common electrode is disposed on the protective layer.

9. The display apparatus of claim 8, wherein the common electrode comprises a main branch portion and a plurality of sub-branch portions protruding from the main branch portion and spaced apart from each other.

10. The display apparatus of claim 1, wherein the common electrode is disposed between the first insulating substrate and the gate insulating layer and insulated from the gate electrode.

11. The display apparatus of claim 10, wherein the pixel electrode comprises a main branch portion and a plurality of sub-branch portions protruding from the main branch portion and spaced apart from each other.

12. The display apparatus of claim 1, wherein the common electrode is disposed on the second insulating substrate.

13. A method of manufacturing a display apparatus, comprising:

forming a first conductive layer on a first insulating substrate;

patterning the first conductive layer to form a gate electrode;

forming a gate insulating layer on the first insulating substrate to cover the gate electrode;

sequentially forming a semiconductor material and a second conductive layer on the gate insulating layer;

patterning the semiconductor material and the second conductive layer to form a semiconductor pattern, a source electrode, and a drain electrode, the source and drain electrodes being formed on the semiconductor pattern and spaced apart from each other to expose a portion of the semiconductor pattern;

sequentially forming a first transparent conductive metal oxide layer and a second transparent conductive metal oxide layer on the gate insulating layer;

patterning the first and second transparent conductive metal oxide layers to expose the portion of the semiconductor pattern and to form a pixel electrode connected to the drain electrode;

plasma-treating the first insulating substrate with a plasma containing a hydrogen source or a plasma containing a hydrogen and nitrogen source; and

forming a protective layer to cover the pixel electrode, wherein the first conductive metal oxide layer comprises a conductive metal oxide layer containing at least indium and the second conductive metal oxide layer comprises a conductive metal oxide layer not containing the indium.

14. The method of claim 13, wherein each of the first conductive metal oxide layer and the second conductive metal oxide layer comprises at least one of tin or zinc.

15. The method of claim 14, wherein the second conductive metal oxide layer comprises a dopant containing at least one of aluminum, germanium, or gallium.

16. The method of claim 15, wherein the second pixel electrode comprises about 5 weight percent or less of the dopant.

17. The method of claim 13, wherein the second conductive layer has a single-layer structure or a multi-layer structure comprising nickel, chromium, molybdenum, aluminum, titanium, copper, tungsten, or an alloy thereof.

18. The method of claim 17, wherein the second conductive layer comprises titanium and copper.

19. The method of claim 13, wherein the first conductive metal oxide layer is thinner than the second conductive metal oxide layer.

20. The method of claim 13, wherein the semiconductor pattern, the source electrode, and the drain electrode are formed by a photolithography process using a slit mask or a diffraction mask.

21. The method of claim 13, further comprising forming a common electrode between the first insulating substrate and the gate insulating layer or on the protective layer.