ANALOG INTERFACE FOR A MICROPROCESSOR-BASED DEVICE

• US 20120173787A1
• Filed: 12/30/2010
• Published: 07/05/2012
• Est. Priority Date: 12/30/2010
• Status: Active Grant

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Westwick, Alan L., David, Thomas S.
• Granted Patent: US 9,710,031 B2
• Time in Patent Office: Days
• US Class Current: 710/313
• CPC Class Codes: G06F 1/00 Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00 architectures of general purpose stored program computers G06F15/76
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 13/14 Handling requests for interconnection or transfer

Abstract

An apparatus includes an integrated circuit, which includes a processor and a driver. The integrated circuit is fabricated by a process that establishes a nominal maximum voltage for components of the integrated circuit. The driver is adapted to selectively electrically couple a voltage that is higher than the nominal maximum voltage to an external terminal of the integrated circuit.

Claims

1. An apparatus comprising:

an integrated circuit comprising a processor and a driver, the integrated circuit being fabricated by a process establishing a nominal maximum voltage for components of the integrated circuit,

wherein the driver is adapted to selectively electrically couple a voltage higher than the nominal maximum voltage to an external terminal of the integrated circuit.

2. The apparatus of claim 1, wherein the integrated circuit further comprises:

a voltage regulation circuit adapted to receive the higher voltage and furnish a regulated voltage less than the maximum voltage.

3. The apparatus of claim 2, wherein the integrated circuit is adapted to allow the driver be selectively configured to perform one of (a) control a coupling between the external terminal and the higher voltage and (b) control a coupling between the external terminal and the regulated voltage.

4. The apparatus of claim 2, wherein the integrated circuit further comprises:

a serial bus interface adapted to couple a power line of a serial bus to an input terminal of the voltage regulation circuit.

5. The apparatus of claim 4, wherein the serial bus interface comprises a Universal Serial Bus (USB) interface adapted to couple a power line of a Universal Serial Bus to the input terminal of the voltage regulation circuit.

6. The apparatus of claim 2, wherein the processor is adapted to control the driver to selectively couple the regulated voltage to a power supply rail.

7. The apparatus of claim 1, wherein the processor is adapted to control the driver to selectively couple together power supply rails, at least one of the power supply rails being external to the integrated circuit.

8. The apparatus of claim 1, wherein the processor is adapted to control the driver to manage a distribution of power derived from a power line of a Universal Serial Bus (USB).

9. The apparatus of claim 1, wherein the processor is adapted to control the driver to control provision of power to a load external to the integrated circuit.

10. The apparatus of claim 1, wherein the driver comprises a current path and a current limiter adapted to establish a programmable maximum limit for current in the current path.

11. The apparatus of claim 1, wherein the driver comprises a slew rate controller adapted to control a slew rate of the voltage.

12. A method comprising:

using an integrated circuit comprising a processor and a driver to control provision of power to a load external to the integrated circuit, the integrated circuit being fabricated by a process establishing a nominal maximum voltage for circuit components of the integrated circuit; and

selectively operating the driver to couple a voltage higher than the nominal maximum voltage to the load.

13. The method of claim 12, wherein operating the driver comprises executing at least one instruction by the processor to selectively couple together power supply rails, at least one of the power supply rails being external to the integrated circuit.

14. The method of claim 12, further comprising using a voltage regulation circuit integrated within the integrated circuit to regulate the voltage.

15. The method of claim 12, further comprising managing a distribution of power derived from a power line of a Universal Serial Bus by executing at least one instruction on the processor to control the driver.

16. An apparatus, comprising:

an integrated circuit comprising a processor, a driver and a serial bus interface adapted to be coupled to a power line of a serial bus,

wherein the processor is adapted to control the driver to selectively couple the power line of the serial bus to a first circuit external to the integrated circuit.

17. The apparatus of claim 16, wherein the integrated circuit further comprises regulation circuitry to regulate a voltage received from the power line and furnish a regulated voltage to the first circuit.

18. The apparatus of claim 16, wherein the driver is adapted to selectively couple the power line of the serial bus to a power rail external to the integrated circuit.

19. The apparatus of claim 16, wherein the integrated circuit further comprises at least one additional driver adapted to selectively couple the power line to a second circuit external to the integrated circuit.

20. The apparatus of claim 16, wherein the serial bus interface is adapted to couple the integrated circuit to a Universal Serial Bus (USB).