HIGH-DYNAMIC-RANGE IMAGING DEVICES

• US 20120188423A1
• Filed: 03/31/2011
• Published: 07/26/2012
• Est. Priority Date: 01/24/2011
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Inventors: Solhusvik, Johannes
• Granted Patent: US 8,723,975 B2
• Time in Patent Office: Days
• US Class Current: 348/294
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H04N 23/741 by increasing the dynamic range of the image compared to the dynamic range of the electronic image sensors
• CPC Class Codes: H04N 25/583 with different integration times
• CPC Class Codes: H04N 25/59 by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
• CPC Class Codes: H04N 25/771 comprising storage means other than floating diffusion

Abstract

High-dynamic-range images may be produced by combining multiple integration periods of varying duration, wherein each integration is obtained using a global shutter operation. Charge accumulated during a first integration period may be stored on a first storage node while charge accumulated during a second and third integration time are carried out. Storage of charges accumulated during the second and third integration periods on a second storage node within a pixel while charge is stored on the first storage node allows capture of a global-shutter-based, high-dynamic-range image. A global-shutter-based image capture base on at least three integration time periods may provide enhanced dynamic range.

Claims

1. A method for capturing high-dynamic-range image data with an image pixel, wherein the image pixel comprises a photosensor, a first charge storage region, a second charge storage region, a charge readout circuit coupled between the second charge storage region and an output line, a first transistor coupled between the photosensor and the first charge storage region, and a second transistor coupled between the first charge storage region and the second charge storage region, the method comprising:

accumulating a first amount of charge with the photosensor;

transferring the first amount of charge from the photosensor to the second charge storage region using the first and second transistors;

while the first amount of charge is stored on the second charge storage region, accumulating a second amount of charge with the photosensor; and

transferring the second amount of charge from the photosensor to the first charge storage region with the first transistor without disturbing the first amount of charge stored on the second charge storage region.

2. The method defined in claim 1 further comprising:

with the charge readout circuit, supplying a first signal to the output line corresponding to the first amount of charge on the second charge storage region.

3. The method defined in claim 2 further comprising:

following the supplying of the first signal to the output line with the charge readout circuit, transferring the second amount of charge from the first charge storage region to the second charge storage region with the second transistor.

4. The method defined in claim 3 further comprising:

following the transferring of the second amount of charge from the first charge storage region to the second charge storage region with the second transistor, supplying a second signal to the output line corresponding to the second amount of charge using the charge readout circuit.

5. The method defined in claim 4 further comprising:

before transferring the second amount of charge from the first charge storage region to the second charge storage region, resetting the second charge storage region.

6. The method defined in claim 5 further comprising:

after resetting the second charge storage region and before transferring the second amount of charge from the first charge storage region to the second charge storage region, using the readout circuit and the output line to read out a signal from the second charge storage region.

7. The method defined in claim 6 wherein the charge readout circuit comprises a source follower transistor having a gate coupled to the second charge storage region and wherein using the readout circuit and the output line to read out the signal from the second charge storage region comprises using the source follower transistor to supply the signal to the output line.

8. The method defined in claim 7 wherein accumulating the second amount of charge with the photosensor while the first amount of charge is stored on the second charge storage region comprises:

accumulating charge with the photosensor;

after accumulating the charge, using a third transistor to partially reset the photosensor; and

accumulating additional charge with the photosensor following use of the third transistor to partially reset the photosensor.

9. The method defined in claim 8 wherein accumulating the first amount of charge comprises accumulating charge for a first time period, wherein accumulating the second amount of charge comprises accumulating charge for a second time period, and wherein the first time period is shorter than the second time period.

10. The method defined in claim 1 wherein accumulating the second amount of charge with the photosensor while the first amount of charge is stored on the second charge storage region comprises:

accumulating charge with the photosensor;

after accumulating the charge, using a third transistor to partially reset the photosensor; and

accumulating additional charge with the photosensor following use of the third transistor to partially reset the photosensor.

11. The method defined in claim 1 wherein accumulating the first amount of charge comprises accumulating charge for a first time period, wherein accumulating the second amount of charge comprises accumulating charge for a second time period, and wherein the first time period is shorter than the second time period.

12. The method defined in claim 11 wherein accumulating the charge for the second time period comprises:

accumulating charge for a third time period;

after accumulating the charge, partially resetting the photosensor;

after partially resetting the photosensor, accumulating additional charge for a fourth time period that is shorter than the third time period.

13. The method defined in claim 12 wherein the fourth time period is longer than the first time period.

14. The method defined in claim 13 wherein the output line is coupled to processing circuitry and wherein the first amount of charge and the second amount of charge are combined to form a single high-dynamic-range image pixel value with the processing circuitry.

15. A method for capturing high-dynamic-range image data with an image pixel array using a global shutter scheme, wherein the image pixel array comprises a plurality of image pixels, wherein each image pixel comprises a photosensor, a first charge storage region, a second charge storage region, a charge readout circuit, and a reset transistor, the method comprising:

asserting a global reset signal to reset the photosensor in each image pixel;

for a first time period, accumulating a first amount of charge with the photosensor in each image pixel;

storing the first amount of charge on the second charge storage region in each image pixel;

for a second time period, accumulating a second amount of charge with the photosensor in each image pixel; and

storing the second amount of charge on the second charge storage region in each image pixel without disturbing the first amount of charge stored on the second charge storage region of each image pixel.

16. The method defined in claim 15 wherein accumulating the second amount of charge with the photosensor in each image pixel comprises:

accumulating charge with the photosensor in each image pixel for a third time period;

after accumulating the charge with the photosensor in each image pixel, draining excess charge accumulated during the third time period from the photosensor of each image pixel through the reset transistor of each image pixel; and

after draining the excess charge, accumulating additional charge for a fourth time period, wherein the fourth time period is shorter than the third time period, and wherein the fourth time period is longer than the first time period.

17. The method defined in claim 16, wherein the image pixels of the image pixel array are arranged in rows and columns, wherein each of the image pixels further comprises an additional reset transistor, wherein the charge readout circuit of each image pixel comprises a row-select transistor, wherein the row-select transistor of each image pixel along a column receives a respective one of a plurality of row-select signals, and wherein the readout circuit of each image pixel along a column is coupled to a associated column output line, the method further comprising:

asserting a selected one of the row-select signals to select an image pixel in each column, wherein the selected image pixel in each column is configured to supply a first output signal corresponding to the first amount of charge stored on the second charge storage region to the associated column output line;

resetting the second charge storage region of the selected image pixel in each column to a reset voltage using the additional reset transistor;

asserting the selected one of the row-select signals to configure the selected image pixel in each column to supply a reset signal corresponding to the reset voltage to the associated column output line;

transferring the second amount of charge stored on the first charge storage region to the second charge storage region for each of the selected image pixel in each column; and

asserting the selected one of the row-select signals to configure the selected image pixel in each column to supply a second output signal corresponding to the second of charge stored on the first charge storage region to the associated column output line.

18. The method defined in claim 17 wherein the column output line is coupled to processing circuitry, the method further comprising:

with the processing circuitry, generating a high-dynamic-range pixel value based on the first and second output signals and the reset signal of each image pixel; and

generating a high-dynamic-range image with the high-dynamic-range pixel values of each image pixel.

19. A method for capturing high-dynamic-range images using a global shutter scheme with an electronic device, wherein the electronic device comprises an image pixel array, control circuitry, and processing circuitry, wherein the image pixel array comprises a plurality of image pixels arranged in rows and columns, and wherein each image pixel comprises a photosensor, a first charge storage region, a second charge storage region, and a charge readout circuit the method comprising:

with the control circuitry, asserting a global reset signal to reset the image pixel array;

during a first integration time period, storing a first image on the first charge storage regions of the image pixels; and

storing a second image on the second charge storage regions of the image pixels without disturbing the first image stored on the first charge storage regions of the image pixels.

20. The method defined in claim 19 wherein storing the second image on the second charge storage regions comprises:

during a second integration time period, accumulating charge with the photosensor in each of the plurality of image pixels;

partially resetting the photosensor in each of the plurality of image pixels to an intermediate voltage;

during a third integration time period, accumulating charge with the photosensor in each of the plurality of image pixels; and

transferring the charge accumulated during the second and third integration time periods to the second storage regions of the image pixels, wherein the second integration time period is longer than the third integration time period, and wherein the third integration time period is longer than the first integration time period.

21. The method defined in claim 20, wherein each image pixel further comprises a reset transistor, the method further comprising:

with the charge readout circuit, reading out a first signal that is associated with the first image;

for each image pixel, enabling the reset transistor to reset the first charge storage region to a reset voltage;

with the charge readout circuit, reading out a second signal that is associated with the reset voltage;

for each image pixel, transferring the second image from the second charge storage region to the first charge storage region;

with the charge readout circuit, reading out a third signal that is associated with the second image; and

with the processing circuitry, producing a high-dynamic-range image based on the first, second, and third signals.