PROBE CARD WIRING STRUCTURE

• US 20120194210A1
• Filed: 01/27/2011
• Published: 08/02/2012
• Est. Priority Date: 01/27/2011
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Kuo, Yung-Hsin, Hung, Wensen
• Granted Patent: US 8,841,931 B2
• Time in Patent Office: Days
• US Class Current: 324/754.07
• CPC Class Codes: G01R 1/07378 using an intermediate adapter, e.g. space transformers G01R1/07371 takes precedence
• CPC Class Codes: Y10T 29/49144 by metal fusion

Abstract

The present disclosure provides a probe card for wafer level testing. The probe card includes a space transformer having first power/ground lines and first signal lines embedded therein, wherein the first power/ground and signal lines are configured to have a first wiring pitch on a first surface and a second wiring pitch on a second surface, the second wiring pitch being substantially less than the first wiring pitch; a printed circuit board bonded to the first surface of the space transformer, wherein the printed circuit board includes second power/ground lines and second signal lines embedded in the printed circuit board and coupled to the first power/ground and signal lines; and conductive lines configured to a surface of the printed circuit board remote to the first surface of the space transformer, wherein each of the conductive lines includes a first end coupled to one of the second signal lines and a second end coupled to a different location of the printed circuit board.

Claims

1. A probe card, comprising:

a space transformer having first power/ground lines and first signal lines embedded therein, wherein the first power/ground and signal lines are configured to have a first wiring pitch on a first surface and a second wiring pitch on a second surface, the second wiring pitch being substantially less than the first wiring pitch;

a printed circuit board configured bonded to the first surface of the space transformer, wherein the printed circuit board includes second power/ground lines and second signal lines embedded in the printed circuit board and coupled to the first power/ground and signal lines; and

conductive lines configured to a surface of the printed circuit board remote to the first surface of the space transformer, wherein each of the conductive lines includes a first end coupled to one of the second signal lines and a second end coupled to a different location of the printed circuit board.

2. The probe card of claim 1, wherein the first and second power/ground and signal lines are configured in a standard design for multiple types of wafers and the conductive lines are configured specific to a certain type of wafer.

3. The probe card of claim 1, wherein the conductive lines include one of metal and metal alloy.

4. The probe card of claim 1, wherein the conductive lines are attached to the printed circuit board by manual soldering.

5. The probe card of claim 1, wherein the conductive lines include a coaxial cable for signal and corresponding ground return wiring.

6. The probe card of claim 1, wherein the conductive lines include flex ribbon cables.

7. The probe card of claim 1, wherein one of the conductive lines is coupled to an electrical component formed on the printed circuit board.

8. The probe card of claim 1, wherein

the first wiring pitch ranges from about 30 microns to about 200 microns;

and

the second wiring pitch is equal to or greater than 1 mm.

9. A wafer test system, comprising:

a probe card designed to test a wafer including;

a space transformer having first power/ground lines and first signal lines embedded therein,

a printed circuit board bonded to the space transformer and embedded with second power/ground lines and second signal lines that are coupled to the first power/ground lines and signal lines, respectively, and

conductive lines each having two ends attached to a surface of the printed circuit board remote to the space transformer;

a wafer prober designed to hold the wafer to be tested and control the probe card for wafer testing; and

a tester coupled to the probe card through a connection cable.

10. The wafer test system of claim 9, wherein the first and second power/ground and signal lines are configured in a standard design for multiple types of wafers and the conductive lines are configured specific to a certain type of wafer.

11. The wafer test system of claim 9, wherein each of the conductive lines includes a first end coupled to one of the second signal lines and a second end attached to the printed circuit board at a location a distance away from the first end.

12. The wafer test system of claim 11, wherein the second end is connected to the connection cable.

13. The wafer test system of claim 9, wherein the first power/ground and signal lines are configured to have a first wiring pitch on a first surface and a second wiring pitch on a second surface, the second wiring pitch being substantially less than the first wiring pitch.

14. The wafer test system of claim 13, wherein the second power/ground lines and second signal lines are coupled to the first power/ground and signal lines, respectively.

15. The wafer test system of claim 9, wherein the conductive lines include one of metal and metal alloy and are attached to the printed circuit board by manual soldering.

16. The wafer test system of claim 9, wherein the conductive lines include a coaxial cable for signal and corresponding ground return wiring.

17. The wafer test system of claim 9, wherein the conductive lines include flex ribbon cables.

18. A method of making a probe card, comprising:

bonding a space transformer to a printed circuit board having signal lines embedded therein; and

forming conductive lines on the printed circuit board, wherein each of the conductive lines has a first end bonded to one of the signal lines and a second end bonded to a different region of the printed circuit board, wherein the signal lines are configured in a standard design for multiple types of wafers and the conductive lines are configured specific to a certain type of wafer.

19. The method of claim 18, wherein the forming conductive lines includes bonding the conductive lines to the printed circuit board by manual soldering.

20. The method of claim 18, wherein the forming conductive lines includes forming the conductive lines selected from the group consisting of coaxial cables and flex ribbon cables.