EFFICENT MIGRATION OF VIRTUAL FUNCTIONS TO ENABLE HIGH AVAILABILITY AND RESOURCE REBALANCE

• US 20120254862A1
• Filed: 03/29/2011
• Published: 10/04/2012
• Est. Priority Date: 03/29/2011
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Dong, Yaozu
• Granted Patent: US 8,533,713 B2
• Time in Patent Office: Days
• US Class Current: 718/1
• CPC Class Codes: G06F 2009/4557 Distribution of virtual machine instances; Migration and load balancing
• CPC Class Codes: G06F 2009/45579 I/O management, e.g. providing access to device drivers or storage
• CPC Class Codes: G06F 9/4411 Configuring for operating with peripheral devices; Loading of device drivers
• CPC Class Codes: G06F 9/45558 Hypervisor-specific management and integration aspects
• CPC Class Codes: G06F 9/4856 resumption being on a different machine, e.g. task migration, virtual machine migration G06F9/5088 takes precedence

Abstract

A computing platform (source) supporting virtualization comprises a plurality of virtual machines each including a virtual function driver and a guest operating system, and a hardware block including a plurality of virtual functions and visible states and invisible states. The virtual function driver or a guest OS or a virtual machine monitor further includes a self-emulation layer to create a shadow state, which emulates the invisible states of the virtual function, which is to be migrated. The virtual function driver uses contents of the shadow state to migrate one or more of the plurality of virtual functions to a target virtual machine. The source and the target virtual machines are included in a cloud data center and the virtual functions, migrated to the target virtual machine is highly available to provide services.

Claims

1. A computing platform supporting virtualization, comprises:

a plurality of virtual machines, wherein the plurality of virtual machines include a source virtual machine and a target virtual machine, wherein the source virtual machine includes a first virtual function driver, and

a hardware logic coupled to the plurality of virtual machines, wherein the hardware logic is to include one or more devices, wherein the one or more devices include a physical function and one or more virtual functions, wherein the one or more virtual functions include visible states and invisible states, wherein the visible states and the invisible states are representative of device states of the one or more virtual functions,

wherein the first virtual function driver is to support a self-emulation layer, wherein the self-emulation layer is to create a shadow state to emulate the invisible states of the one or more virtual functions coupled to the source virtual machine, wherein the first virtual function is to be migrated to the target virtual machine.

2. The computing platform of claim 1, wherein the invisible states include a Read-only (RO) state.

3. The computing platform of claim 1, wherein the invisible states include a Write-only (WO) state.

4. The computing platform of claim 1, wherein the invisible states include a Status state Register (SSR).

5. The computing platform of claim 1, wherein the invisible states include Indirect register States (IS), wherein the Indirect register States further includes an Indirect Read State.

6. The computing platform of claim 1, wherein the Indirect register States further includes an Indirect Write State.

7. The computing platform of claim 1, wherein the self-emulation layer is to trap accesses created by the first virtual function driver to create the shadow state representing the invisible states.

8. The computing platform of claim 7, wherein the self-emulation layer is to trap the invisible states available in one or more state registers provided in the first virtual function.

9. The computing platform of claim 7, wherein the self-emulation layer is to trap the invisible states available in circuit logic provided in the first virtual function.

10. The computing platform of claim 1, wherein the self-emulation layer is provided in the first guest operating system and the one or more devices include a single root-I/O virtualization (SR-IOV) or a multi root-I/O virtualization (MR-IOV) capable network interface card.

11. A method in a computing platform, which supports virtualization, comprising:

creating a shadow state in a self-emulation layer, wherein the shadow state is to emulate invisible states of a first virtual function coupled to a source virtual machine, wherein the self-emulation layer is provided in a first virtual function driver, wherein the first virtual function is to be migrated to a target virtual machine, and

using device state information in the shadow state to access a virtual function that is migrated to the target virtual machine, wherein a second virtual function driver is to use the device state information to access the virtual function after migration,

wherein the computing platform comprises a plurality of virtual machines and a hardware logic, wherein the plurality of virtual machines include the source virtual machine and the target virtual machine, wherein the source virtual machine includes the first virtual function driver and the target virtual machine includes the second virtual function driver,

wherein the hardware logic is coupled to the plurality of virtual machines, wherein the hardware logic is to include one or more devices, wherein the one or more devices include a physical function and one or more virtual functions, wherein the one or more virtual functions include visible states and invisible states, wherein the visible states and the invisible states are representative of device states of the one or more virtual functions.

12. The method of claim 11, wherein the invisible states include a Read-only (RO) state.

13. The method of claim 11, wherein the invisible states include a Write-only (WO) state.

14. The method of claim 11, wherein the invisible states include a Status state Register (SSR).

15. The method of claim 11, wherein the invisible states include Indirect register States (IS), wherein the Indirect register States further includes an Indirect Read State.

16. The method of claim 11, wherein the Indirect register States further includes an Indirect Write State.

17. The method of claim 11, wherein the self-emulation layer is to trap accesses created by the first virtual function driver to create the shadow state representing the invisible states.

18. The method of claim 17, wherein the self-emulation layer is to trap the invisible states available in one or more state registers provided in the first virtual function.

19. The method of claim 17, wherein the self-emulation layer is to trap the invisible states available in circuit logic provided in the first virtual function.

20. The method of claim 11, wherein the self-emulation layer is provided in the first guest operating system and the one or more devices include a single root-I/O virtualization (SR-IOV) or a multi root-I/O virtualization (MR-IOV) capable network interface card.