VOLTAGE REGULATOR WITH DIFFERENT INVERTING GAIN STAGES

• US 20120274307A1
• Filed: 04/29/2011
• Published: 11/01/2012
• Est. Priority Date: 04/29/2011
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Ramaraju, Ravindraraj
• Granted Patent: US 9,035,629 B2
• Time in Patent Office: Days
• US Class Current: 323/349
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence

Abstract

A voltage regulator includes a regulating transistor and a control circuit. The regulating transistor has a first current electrode for providing a regulated voltage, a second current electrode, and a control electrode. The control circuit has an output coupled to the control electrode of the regulating transistor, and an input coupled to the first current electrode of the regulating transistor. The control circuit includes a first inverting gain stage having a first load element, and a second inverting gain stage having a second load element. One of the first or second load elements is characterized as being a diode and the other of the first or second load elements is biased by a bias circuit.

Claims

1. A voltage regulator comprising:

a regulating transistor having a first current electrode for providing a regulated voltage, a second current electrode, and a control electrode; and

a control circuit having an output coupled to the control electrode of the regulating transistor, and an input coupled to the first current electrode of the regulating transistor, the control circuit comprising a first inverting gain stage having a first load element, and a second inverting gain stage having a second load element, wherein one of the first load element or the second load element is characterized as being a diode and the other of the first load element or the second load element is biased by a bias circuit.

2. The voltage regulator of claim 1, wherein the first inverting gain stage further comprises a first transistor having a first current electrode coupled to a first terminal of the first load element, a second current electrode coupled to a power supply voltage terminal, and a control electrode coupled to the first current electrode of the regulating transistor.

3. The voltage regulator of claim 1, wherein the second inverting gain stage further comprises a first transistor having a first current electrode coupled to a first terminal of the second load element, a second current electrode coupled to a first power supply voltage terminal, and a control electrode coupled to an output terminal of the first inverting gain stage.

4. The voltage regulator of claim 1, wherein the bias circuit comprises:

a first transistor having a first current electrode coupled to a first power supply voltage terminal, a second current electrode and a control electrode both coupled together, and

a second transistor having a first current electrode and a control electrode both coupled to the second current electrode and the control electrode of the first transistor, and a second current electrode coupled to a second power supply voltage terminal.

5. The voltage regulator of claim 4, wherein the second load element comprises a third transistor having a first current electrode coupled to the first power supply voltage terminal, a control electrode coupled to the second current electrode of the first transistor, and a second current electrode coupled to the control electrode of the regulating transistor.

6. The voltage regulator of claim 1, wherein the first load element comprises a first transistor having a first current electrode coupled to a first power supply voltage terminal, and a second current electrode and a control electrode coupled together.

7. The voltage regulator of claim 1, wherein the first load element of the first inverting gain stage comprises a diode, the first inverting gain stage has an input coupled to the first current electrode of the regulating transistor, and the first inverting gain stage has an output, and wherein the second load element is biased by the bias circuit, the second inverting gain stage has an input coupled to the output of the first inverting gain stage, and the second inverting gain stage has an output coupled to the control electrode of the regulating transistor.

8. The voltage regulator of claim 1, wherein the first load element of the first inverting gain stage is biased by the bias circuit, the first inverting gain stage has an input coupled to the first current electrode of the regulating transistor, and the first inverting gain stage as an output, and wherein the second load element includes a diode, the second inverting gain stage has an input coupled to the output of the first inverting gain stage, and the second inverting gain stage has an output coupled to the control electrode of the regulating transistor.

9. The voltage regulator of claim 1, wherein the first load element comprises a third transistor having a first current electrode coupled to a first power supply voltage terminal, a second current electrode coupled to an input of the second inverting gain stage, and a control electrode coupled to the bias circuit in a current mirror configuration.

10. The voltage regulator of claim 1, wherein the diode is further characterized as being a diode-connected transistor.

11. A voltage regulator comprising:

a regulating transistor having a first current electrode for providing a regulated voltage, a second current electrode, and a control electrode;

a first inverting gain stage comprising;

a first transistor having a first current electrode, a control electrode and a second current electrode coupled together; and

a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the first current electrode of the regulating transistor, and a second current electrode;

a second inverting gain stage comprising;

a third transistor having a first current electrode, a control electrode, and a second current electrode coupled to the control electrode of the regulating transistor; and

a fourth transistor having a first current electrode coupled to the second current electrode of the third transistor, a control electrode coupled to the second current electrode of the first transistor, and a second current electrode; and

a bias circuit coupled to provide a bias voltage to the control electrode of the third transistor.

12. The voltage regulator of claim 11, wherein the bias circuit comprises:

a fifth transistor having a first current electrode coupled to a first power supply voltage terminal, a second current electrode and a control electrode both coupled together and to the control electrode of the third transistor; and

a sixth transistor having a first current electrode and a control electrode both coupled to the second current electrode and the control electrode of the fifth transistor, and a second current electrode coupled to a second power supply voltage terminal.

13. The voltage regulator of claim 11, further comprising an enabling transistor coupled in parallel with the regulating transistor, the enabling transistor responsive to an enable signal for enabling and disabling the voltage regulator.

14. The voltage regulator of claim 11, wherein the first current electrode of the regulating transistor is coupled to provide the regulated voltage to a memory array.

15. The voltage regulator of claim 11, wherein the regulating transistor, the second transistor, and the fourth transistor are N-channel transistors and the first transistor and the third transistor are P-channel transistors.

16. A voltage regulator comprising:

a regulating transistor having a first current electrode for providing a regulated voltage, a second current electrode, and a control electrode;

a first inverting gain stage comprising;

a first transistor having a first current electrode, a control electrode, and a second current electrode; and

a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the first current electrode of the regulating transistor, and a second current electrode;

a second inverting gain stage comprising;

a third transistor having a first current electrode, and a second current electrode and a control electrode coupled together and to the control electrode of the regulating transistor; and

a fourth transistor having a first current electrode coupled to the second current electrode of the third transistor, a control electrode coupled to the second current electrode of the first transistor, and a second current electrode; and

a bias circuit coupled to provide a bias voltage to the control electrode of the first transistor.

17. The voltage regulator of claim 16, wherein the bias circuit forms a current mirror with the first transistor.

18. The voltage regulator of claim 16, wherein the regulating transistor, the second transistor and the fourth transistor are N-channel transistors, and the first transistor and the third transistor are P-channel transistors.

19. The voltage regulator of claim 16, further comprising an enabling transistor coupled in parallel with the regulating transistor, the enabling transistor responsive to an enable signal for enabling and disabling the voltage regulator.

20. The voltage regulator of claim 16, wherein the bias circuit comprises:

a fifth transistor having a first current electrode coupled to a first power supply voltage terminal, and a second current electrode and control electrode coupled together; and

a sixth transistor having a first current electrode and control electrode coupled together, and a second current electrode coupled to a second power supply voltage terminal.