SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20120288993A1
• Filed: 05/08/2012
• Published: 11/15/2012
• Est. Priority Date: 05/13/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: SASAGAWA, Shinya, NAKAYAMA, Hitoshi, FUJIKI, Hiroshi
• Granted Patent: US 9,093,539 B2
• Time in Patent Office: Days
• US Class Current: 438/104
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

To establish a processing technique in manufacture of a semiconductor device including an In—Sn—Zn—O-based semiconductor. An In—Sn—Zn—O-based semiconductor layer is selectively etched by dry etching with the use of a gas containing chlorine such as Cl₂, BCl₃, SiCl₄, or the like. In formation of a source electrode layer and a drain electrode layer, a conductive layer on and in contact with the In—Sn—Zn—O-based semiconductor layer can be selectively etched with little removal of the In—Sn—Zn—O-based semiconductor layer with the use of a gas containing oxygen or fluorine in addition to a gas containing chlorine.

Claims

1. A method for manufacturing a semiconductor device comprising the steps of:

forming an oxide semiconductor layer over an oxide insulating layer, and

selectively removing the oxide semiconductor layer by dry etching using a gas containing chlorine so that part of the oxide insulating layer is exposed,

wherein the oxide semiconductor layer comprises In, Sn, and Zn.

2. A method for manufacturing a semiconductor device according to claim 1, wherein a taper angle of an end portion of the oxide semiconductor layer is greater than or equal to 10°

and less than or equal to 70°

after the dry etching.

3. A method for manufacturing a semiconductor device according to claim 1, wherein the gas containing chlorine, a gas containing oxygen, a gas containing fluorine, a rare gas, or a hydrocarbon gas is used.

4. A method for manufacturing a semiconductor device according to claim 1, wherein the gas containing chlorine is Cl₂, SiCl₄, or BCl₃.

5. A method for manufacturing a semiconductor device comprising the steps of:

forming an oxide semiconductor layer over an oxide insulating layer;

selectively removing the oxide semiconductor layer by dry etching using a gas containing chlorine so that part of the oxide insulating layer is exposed;

forming a conductive layer over the oxide semiconductor layer;

forming a source electrode layer and a drain electrode layer by processing the conductive layer;

forming a gate insulating layer over the source electrode layer and the drain electrode layer; and

forming a gate electrode over the gate insulating layer, and

wherein the oxide semiconductor layer comprises In, Sn, and Zn.

6. A method for manufacturing a semiconductor device according to claim 5, wherein a taper angle of an end portion of the oxide semiconductor layer is greater than or equal to 10°

and less than or equal to 70°

after the dry etching.

7. A method for manufacturing a semiconductor device according to claim 5, wherein part of the oxide insulating layer is exposed by the dry etching and is thinner than a region overlapped with the oxide semiconductor layer.

8. A method for manufacturing a semiconductor device according to claim 5, wherein the gas containing chlorine, a gas containing oxygen, a gas containing fluorine, a rare gas, or a hydrocarbon gas is used.

9. A method for manufacturing a semiconductor device according to claim 5, wherein the gas containing chlorine is Cl₂, SiCl₄, or BCl₃.

10. A method for manufacturing a semiconductor device according to claim 5, wherein dry etching or wet etching is used for processing the conductive layer to form a source electrode layer and a drain electrode layer.

11. A method for manufacturing a semiconductor device comprising the steps of:

forming an oxide semiconductor layer over an oxide insulating layer;

selectively removing the oxide semiconductor layer by a first dry etching with the use of a gas containing chlorine so that part of the oxide insulating layer is exposed;

forming a conductive layer over the oxide semiconductor layer;

processing the conductive layer by a second dry etching with the use of a gas containing fluorine, oxygen, and chlorine so that a source electrode layer and a drain electrode layer are formed;

forming a gate insulating layer over the source electrode layer and the drain electrode layer; and

forming a gate electrode over the gate insulating layer, and

wherein the oxide semiconductor layer comprises In, Sn, and Zn.

12. A method for manufacturing a semiconductor device according to claim 11, wherein a taper angle of an end portion of the oxide semiconductor layer is greater than or equal to 10°

and less than or equal to 70°

after the first dry etching.

13. A method for manufacturing a semiconductor device according to claim 11, wherein part of the oxide insulating layer is exposed by the first dry etching and is thinner than a region overlapped with the oxide semiconductor layer.

14. A method for manufacturing a semiconductor device according to claim 11, wherein part of the oxide semiconductor layer is exposed by the second dry etching and is thinner than a region overlapped with the source electrode layer and the drain electrode layer.

15. A method for manufacturing a semiconductor device according to claim 11, wherein an inductively coupled plasma etching apparatus is used in the first dry etching and the second dry etching.