APPARATUS, METHOD, SYSTEM AND EXECUTABLE MODULE FOR CONFIGURATION AND OPERATION OF ADAPTIVE INTEGRATED CIRCUITRY HAVING FIXED, APPLICATION SPECIFIC COMPUTATIONAL ELEMENTS

• US 20120317397A1
• Filed: 08/20/2012
• Published: 12/13/2012
• Est. Priority Date: 11/30/2001
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: QST Holdings LLC
• Inventors: Master, Paul L., Smith, Stephen J., Watson, John
• Granted Patent: US 8,880,849 B2
• Time in Patent Office: Days
• US Class Current: 712/29
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: G06F 15/80 comprising an array of processing units with common control, e.g. single instruction multiple data processors G06F15/82 takes precedence ; for correlation function computation G06F17/15
• CPC Class Codes: G06F 7/57 Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations G06F7/49, G06F7/491 take precedence
• CPC Class Codes: G06F 9/44505 Configuring for program initiating, e.g. using registry, configuration files
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The present invention concerns configuration of a new category of integrated circuitry for adaptive computing. The various embodiments provide an executable information module for an adaptive computing engine (ACE) integrated circuit and may include configuration information, operand data, and may also include routing and power control information. The ACE IC comprises a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative to configure the plurality of heterogeneous computational elements for a plurality of different functional modes.

Claims

1. A system for configuring and operating an adaptive circuit, the system comprising:

a first routable and executable information module, the first module having first configuration information and having a first routing sequence for routing the configuration information and operand data related to a first functional mode;

a plurality of heterogeneous computational units including a digital signal processing unit, each of the plurality of heterogeneous computational units including a plurality of computational elements, a subset of the plurality of computational elements of one or more of the plurality of heterogeneous computational units designated by the first routing sequence;

an interconnection network coupled to the plurality of heterogeneous computational units, the interconnection network adapted to selectively provide the first module to the plurality of heterogeneous computational units, the interconnection network further adapted to configure interconnections between the subset of the plurality of computational elements for the first functional mode in response to the first configurations information; and

a memory coupled to the interconnection network, the memory adapted to store the first configuration information in a memory location, the module including a flag to the memory location.

2. The system of claim 1, wherein the module coordinates the configuration of the subset of the plurality of computational elements for the first functional mode with operand data.

3. The system of claim 1, wherein the first module further comprises:

an iteration control sequence to direct a temporal continuation of a selected configuration of the subset of the plurality of computational elements.

4. The system of claim 1, wherein the system is embodied within a mobile device having a plurality of operating modes including:

a mobile telecommunication mode, a personal digital assistance mode, a multimedia reception mode, a mobile packet-based communication mode, and a paging mode.

5. The system of claim 1, wherein the plurality of computational elements of the digital signal processing unit each perform a function from the group of multiplication, addition, subtraction, accumulation, summation and dynamic shift.

6. The system of claim 1, wherein the first functional mode is one of fixed point arithmetic functions, floating point arithmetic functions, filtering functions, and transformation functions.

7. The system of claim 1, wherein the plurality of computational elements of the digital signal processing unit perform word level manipulation.

8. A routable and executable information module stored in a machine-readable medium for operating an adaptive system, the adaptive system including a plurality of heterogeneous computational units including a digital signal processing unit, the computational units each having differing computing architectures including a plurality of interconnected computational elements and an interconnection network responsive to configure interconnections between the plurality of computational elements for a plurality of operating modes, the module comprising:

a configuration sequence to direct a first configuration of the interconnections between the plurality of computational elements to perform a first operating mode;

a routing sequence to route information for selective routing of the configuration sequence to the interconnections between the plurality of computational elements; and

an iteration control sequence to direct a temporal continuation of the first configuration of the plurality of computational elements.

9. The module of claim 8, wherein the computational elements of the digital signal processing unit each perform a function from the group of multiplication, addition, subtraction, accumulation, summation and dynamic shift.

10. The module of claim 8, wherein the configuration sequence directs the configuration of the digital signal processing unit to perform a function including one of fixed point arithmetic functions, floating point arithmetic functions, filtering functions, and transformation functions.

11. The module of claim 8, wherein the configuration sequence directs one of the computational units to perform a bit level manipulation computational function and directs the digital signal processing unit to perform word level manipulation.

12. The module of claim 8, wherein the plurality of heterogeneous computational units includes a simple computational unit having a plurality computational elements including a function generator and an adder, a register and an adder, a function generator and a register, or a function generator and an adder and a register, the function generator having data inputs and a control input to selection a specific function;

and

wherein the plurality of computational elements of the digital signal processing unit includes a multiplier and an adder, a multiplier and a register, or a multiplier and an adder and a register.

13. A system for configuring and operating an adaptive circuit, the system comprising:

a first routable and executable information module, the module having first configuration information, second configuration information, and a first routing sequence;

a first simple computational unit having a first computational architecture including a first plurality of interconnected computational elements;

a second complex computational unit having a second, different computational architecture including a second plurality of interconnected computational elements, a subset of the plurality of computational elements of the first and second units designated by the first routing sequence of the first executable information module; and

an interconnection network coupled to the plurality of heterogeneous computational units, the interconnection network selectively providing the module to the first and second computational units, the interconnection network further causing interconnections between the subset of the plurality of computational elements to be configured for performance of a first functional mode in response to the first configuration information, and the interconnection network causing the interconnections between at least some of the subset of the plurality of computational elements to be reconfigured for performance of a second functional mode in response to the second configuration information, the first functional mode being different than the second functional mode; and

wherein the first executable information module includes timing data for the configuration and reconfiguration of the computational elements to perform the first and second functional modes.

14. The system of claim 13, further comprising a memory coupled to the interconnection network, the memory adapted to store the first and second configuration information in a memory location, the module including a flag to the memory location.

15. The system of claim 13, further comprising a memory coupled to the interconnection network, the memory storing the first configuration information and the second configuration information.

16. The system of claim 13, wherein the module coordinates the configuration of the subset of the plurality of computational elements for the first functional mode with operand data.

17. The system of claim 13, wherein the first module further comprises:

an iteration control sequence to direct a temporal continuation of a selected configuration of the subset of the plurality of computational elements.

18. The system of claim 13, wherein the system is embodied within a mobile device having a plurality of operating modes, the plurality of operating modes comprising at least two of the following modes:

a mobile telecommunication mode, a personal digital assistance mode, a multimedia reception mode, a mobile packet-based communication mode, and a paging mode.

19. The system of claim 13, wherein the second plurality of heterogeneous computational elements of the configurable complex processing unit each perform a function from the group of multiplication, addition, subtraction, accumulation, summation and dynamic shift.

20. The system of claim 13, wherein the complex function is a digital signal processing function including one of fixed point arithmetic functions, floating point arithmetic functions, filtering functions, and transformation functions.