Radio Frequency Identification (RFID) Tag for an Item Having a Conductive Layer Included or Attached

• US 20120318872A1
• Filed: 08/27/2012
• Published: 12/20/2012
• Est. Priority Date: 11/22/2004
• Status: Active Grant

• Current Assignee: RUIZHANG TECHNOLOGY LIMITED COMPANY
• Original Assignee: RUIZHANG TECHNOLOGY LIMITED COMPANY
• Inventors: Carrender, Curt
• Granted Patent: US 9,070,063 B2
• Time in Patent Office: Days
• US Class Current: 235/488
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/07788 the antenna being of the capacitive type
• CPC Class Codes: G08B 13/2417 having a radio frequency identification chip
• CPC Class Codes: G08B 13/2437 Tag layered structure, processes for making layered tags
• CPC Class Codes: G08B 13/2445 Tag integrated into item to be protected, e.g. source tagging
• CPC Class Codes: H01L 2224/24227 the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
• CPC Class Codes: H01L 2224/7665 Means for transporting the components to be connected
• CPC Class Codes: H01L 2224/82039 using a laser
• CPC Class Codes: H01L 2224/95085 being a liquid, e.g. for fluidic self-assembly
• CPC Class Codes: H01L 2224/95136 involving guiding structures, e.g. shape matching, spacers or supporting members
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01027 Cobalt [Co]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01075 Rhenium [Re]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15153 the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15155 : the shape of the recess being other than a cuboid
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: Y10T 29/49016 : Antenna or wave energy "plumbing" making
• CPC Class Codes: Y10T 29/49128 : Assembling formed circuit to base
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base

Abstract

An RFID device. The device comprises a conductive layer formed on a first substrate. An opening line (or two or more opening lines) is formed in the conductive layer to make the conductive layer a part of an antenna structure. An integrated circuit chip is placed over at least a portion the opening line and coupled to the conductive layer. The integrated circuit chip is electrically interconnected to the conductive layer.

Claims

1. A device comprising:

a first substrate layer having a metallization layer formed on a surface of the first substrate layer, wherein a portion of the first substrate layer is not covered by the metallization layer;

wherein the metallization layer serves a normal function for the device;

a radio frequency identification (RFID) chip coupled to the portion of the first substrate layer not covered by the metallization layer, without making contact with the metallization layer;

a conductive layer which couples the RFID chip to the metallization layer, wherein the metallization layer serves an additional function as an antenna for the RFID chip, such that the normal function of the metallization layer is not affected by the coupling.

2. The device of claim 1 wherein the conductive layer has a configuration selected from a group consisting of loop, circular, straight, curved, folded, and dipole.

3. The device of claim 1 wherein the RFID chip is deposited in a second substrate having a receptor configured to receive the RFID chip and wherein the second substrate is adhered to the first substrate layer such that the RFID chip is interconnected to the conductive layer.

4. The device of claim 3 wherein the RFID chip is deposited in the second substrate using a fluidic-self-assembly (FSA) process.

5. The device of claim 3 wherein the RFID chip is recessed below a surface of the second substrate.

6. The device of claim 4 wherein the FSA process is performed with a web material in which a web material for the second substrate is provided.

7. The device of claim 3 wherein the RFID chip is configured with a predetermined shape and size and the receptor is configured with a complimentary shape and size to the RFID chip.

8. A method for creating a device comprising:

forming a metallization layer on a surface of a first substrate layer, wherein a portion of the first substrate layer is not covered by the metallization layer;

wherein the metallization layer serves a normal function of the device;

coupling a radio frequency identification (RFID) chip to the portion of the first substrate layer not covered by the metallization layer, without making contact with the metallization layer;

coupling the RFID chip to the metallization layer by forming a conductive layer on the first substrate which extends from the RFID chip to the metallization layer, wherein the metallization layer serves an additional function as an antenna for the RFID chip, such that the normal function of the metallization layer is not affected by the coupling of the RFID chip to the metallization layer.

9. The method of claim 8 wherein the conductive layer has a configuration selected from a group consisting of loop, circular, straight, curved, folded, and dipole.

10. The method of claim 8 further comprising:

placing a cap layer over the conductive layer and the RFID chip.

11. The method of claim 8 further comprising:

recessing the RFID chip into a second substrate; and

coupling the second substrate to the first substrate layer such that the RFID chip is interconnected to the conductive layer.

12. The method of claim 11 wherein the recessing the RFID chip into the second substrate further comprises depositing the RFID chip into a receptor created in the second substrate using a fluidic-self-assembly (FSA) process.

13. The method of claim 11 wherein the RFID chip is recessed below a surface of the second substrate.

14. The method of claim 11 wherein an insulation layer is formed on top of the RFID chip.

15. The method of claim 12 wherein the FSA process is performed with a web material in which a web material is provided for the second substrate.