ENHANCING SCHOTTKY BREAKDOWN VOLTAGE (BV) WITHOUT AFFECTING AN INTEGRATED MOSFET-SCHOTTKY DEVICE LAYOUT
First Claim
1. A semiconductor power device comprising an active cell area having a plurality of power transistor cells wherein:
- each of said power transistor cells having a planar Schottky diode comprising a Schottky junction barrier metal covering area surrounded by a heavy body region doped in a body region;
a source region doped in the body region surrounding said heavy body region;
a trench surrounding said source and body region.
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Abstract
This invention discloses a semiconductor power device that includes an active cell area having a plurality of power transistor cells. Each of said power transistor cells has a planar Schottky diode that includes a Schottky junction barrier metal covering areas above gaps between separated body regions between two adjacent power transistor cells. The separated body regions further provide a function of adjusting a leakage current of said Schottky diode in each of said power transistor cells. Each of the planar Schottky diodes further includes a Shannon implant region disposed in a gap between the separated body regions of two adjacent power transistor cells for further adjusting a leakage current of said Schottky diode. Each of the power transistor cells further includes heavy body doped regions in the separated body regions next to source regions surrounding said Schottky diode forming a junction barrier Schottky (JBS) pocket region.
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Citations
3 Claims
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1. A semiconductor power device comprising an active cell area having a plurality of power transistor cells wherein:
each of said power transistor cells having a planar Schottky diode comprising a Schottky junction barrier metal covering area surrounded by a heavy body region doped in a body region;
a source region doped in the body region surrounding said heavy body region;
a trench surrounding said source and body region.- View Dependent Claims (2)
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3. A method for manufacturing a semiconductor power device to form an active cell area with a plurality of power transistor cells comprising:
forming said power transistor cells in said active cell area with separated body regions having gaps between two adjacent power transistors and forming a planar Schottky diode in each of said power transistor cells by depositing a Schottky junction barrier metal covering areas above said gaps between separated body regions for applying a heavy body doped region disposed in said separated body regions surrounding said Schottky diode to adjust a leakage current of said Schottky diode in each of said power transistor cells
Specification